• 제목/요약/키워드: equivalent link

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Failure analysis of prestressing steel wires

  • Toribio, J.;Valiente, A.
    • Steel and Composite Structures
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    • 제1권4호
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    • pp.411-426
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    • 2001
  • This paper treats the failure analysis of prestressing steel wires with different kinds of localised damage in the form of a surface defect (crack or notch) or as a mechanical action (transverse loads). From the microscopical point of view, the micromechanisms of fracture are shear dimples (associated with localised plasticity) in the case of the transverse loads and cleavage-like (related to a weakest-link fracture micromechanism) in the case of cracked wires. In the notched geometries the microscopic modes of fracture range from the ductile micro-void coalescence to the brittle cleavage, depending on the stress triaxiality in the vicinity of the notch tip. From the macroscopical point of view, fracture criteria are proposed as design criteria in damage tolerance analyses. The transverse load situation is solved by using an upper bound theorem of limit analysis in plasticity. The case of the cracked wire may be treated using fracture criteria in the framework of linear elastic fracture mechanics on the basis of a previous finite element computation of the stress intensity factor in the cracked cylinder. Notched geometries require the use of elastic-plastic fracture mechanics and numerical analysis of the stress-strain state at the failure situation. A fracture criterion is formulated on the basis of the critical value of the effective or equivalent stress in the Von Mises sense.

Application of the Murakami Approach for Prediction of Surface Fatigue of Cemented Carbides

  • Sergejev, Fjodor;Kubarsepp, Jakob;Preis, Irina
    • 한국분말야금학회:학술대회논문집
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    • 한국분말야금학회 2006년도 Extended Abstracts of 2006 POWDER METALLURGY World Congress Part 1
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    • pp.633-634
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    • 2006
  • The aim of present work is to link geometrical parameter of maximum area of structural defect $\sqrt{area}\;_{max}$ (proposed by Y. Murakami, 1983) with surface fatigue mechanisms. Determined relations allow making predictions of surface fatigue properties of cemented carbides (WC-Co hardmetal - H15 - 85wt% WC and 15wt %Co, TiC-based cermets - T60/8 - 60wt %TiC and Fe/8wt% Ni and T70/14 - 70wt %TiC and Fe/14wt% Ni) in conditions of rolling contact and impact cycling loading. Pores considered being equivalent to small defects. Three comparative defects conditions are distinguished: surface pore, just below free surface and interior pores. The Vickers hardness of binder (as main responsible for the fracture mechanism of hardmetal and cermets) assumed to be the basis of such assumption. The estimate of this prediction has been done by analyzing the pore sizes using the statistics of extremes. The lower bound of fatigue properties can be correctly predicted by considering the maximum occurring pore size.

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일대다 연결 고려한 ATM 망에서의 최적 루팅 (An Optimal Routing for Point to Multipoint Connection Traffics in ATM Networks)

  • 정성진;홍성필;정후상;김지호
    • 대한산업공학회지
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    • 제25권4호
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    • pp.500-509
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    • 1999
  • In this paper, we consider an optimal routing problem when point-to-point and point-to-multipoint connection traffics are offered in an ATM network. We propose a mathematical model for cost-minimizing configuration of a logical network for a given ATM-based BISDN. Our model is essentially identical to the previous one proposed by Kim(Kim, 1996) which finds a virtual-path configuration where the relevant gains obtainable from the ATM technology such as the statistical multiplexing gain and the switching/control cost-saving gain are optimally traded-off. Unlike the Kim's model, however, ours explicitly considers the VP's QoS(Quality of Service) for more efficient utilization of bandwidth. The problem is a large-scale, nonlinear, and mixed-integer problem. The proposed algorithm is based on the local linearization of equivalent-capacity functions and the relaxation of link capacity constraints. As a result, the problem can be decomposed into moderate-sized shortest path problems, Steiner arborescence problems, and LPs. This fact renders our algorithm a lot faster than the previous nonlinear programming algorithm while the solution quality is maintained, hence application to large-scale network problems.

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The Development of High-Current Power Supply System for Electrolytic Copper Foil

  • Luo, An;Ma, Fujun;Xiong, Qiaopo;He, Zhixing
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.399-410
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    • 2015
  • A 6.5 V/50 kA high-frequency switching power supply (HSPS) system composed of 10 power modules is developed to meet the requirements of copper-foil electrolysis. The power module is composed of a two-leg pulse width modulation (PWM) rectifier and a DC/DC converter. The DC/DC converter adopts two full-wave rectifiers in parallel to enhance the output. For the two-leg PWM rectifier, the ripple of the DC-link voltage is derived. A composite control method with a ripple filter is then proposed to effectively improve the performance of the rectifier. To meet the process demand of copper-foil electrolysis, the virtual impedance-based current-sharing control method with load current full feedforward is proposed for n-parallel DC/DC converters. The roles of load current feedforward and virtual impedance are analyzed, and the current-sharing control model of the HSPS system is derived. Virtual impedance is used to adjust the current-sharing impedance without changing the equivalent output impedance, which can effectively reduce current-sharing errors. Finally, simulation and experimental results verify the structure and control method.

Three-phase Three-level Boost-type Front-end PFC Rectifier for Improving Power Quality at Input AC Mains of Telecom Loads

  • Saravana, Prakash P.;Kalpana, R.;Singh, Bhim
    • Journal of Power Electronics
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    • 제18권6호
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    • pp.1819-1829
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    • 2018
  • A three-phase, three-switch, and three-level boost-type PWM rectifier (Vienna rectifier) is proposed as an active front-end power factor correction (PFC) rectifier for telecom loads. The proposed active front-end PFC rectifier system is modeled by the switching cycle average model. The relation between duty ratios and DC link capacitor voltages is derived in terms of the system input currents. Furthermore, the feasible switching states are identified and applied to the proposed system to reduce the switching stress and DC ripples. A detailed equivalent circuit analysis of the proposed front-end PFC rectifier is conducted, and its performance is verified through simulations in MATLAB. Simulation results are verified using an experimental setup of an active front-end PFC rectifier that was developed in the laboratory. Simulation and experimental results demonstrate the improved power quality parameters that are in accordance with the IEEE and IEC standards.

Analysis and Control of NPC-3L Inverter Fed Dual Three-Phase PMSM Drives Considering their Asymmetric Factors

  • Chen, Jian;Wang, Zheng;Wang, Yibo;Cheng, Ming
    • Journal of Power Electronics
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    • 제17권6호
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    • pp.1500-1511
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    • 2017
  • The purpose of this paper is to study a high-performance control scheme for neutral-point-clamping three-level (NPC-3L) inverter fed dual three-phase permanent magnet synchronous motor (PMSM) drives by considering some asymmetric factors such as the non-identical parameters in phase windings. To implement this, the system model is analyzed for dual three-phase PMSM drives with asymmetric factors based on the vector space decomposition (VSD) principle. Based on the equivalent circuits, PI controllers with feedforward compensation are used in the d-q subspace for regulating torque, where the cut-off frequency of the PI controllers are set at the twice the fundamental frequency for compensating both the additional DC component and the second order component caused by asymmetry. Meanwhile, proportional resonant (PR) controllers are proposed in the x-y subspace for suppressing the possible unbalanced currents in the phase windings. A dual three-phase space vector modulation (DT-SVM) is designed for the drive, and the balancing factor is designed based on the numerical fitting surface for balancing the DC link capacitor voltages. Experimental results are given to demonstrate the validity of the theoretical analysis and the proposed control scheme.

Smart composite repetitive-control design for nonlinear perturbation

  • ZY Chen;Ruei-Yuan Wang;Yahui Meng;Timothy Chen
    • Steel and Composite Structures
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    • 제51권5호
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    • pp.473-485
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    • 2024
  • This paper proposes a composite form of fuzzy adaptive control plan based on a robust observer. The fuzzy 2D control gains are regulated by the parameters in the LMIs. Then, control and learning performance indices with weight matrices are constructed as the cost functions, which allows the regulation of the trade-off between the two performance by setting appropriate weight matrices. The design of 2D control gains is equivalent to the LMIs-constrained multi-objective optimization problem under dual performance indices. By using this proposed smart tracking design via fuzzy nonlinear criterion, the data link can be further extended. To evaluate the performance of the controller, the proposed controller was compared with other control technologies. This ensures the execution of the control program used to track position and trajectory in the presence of great model uncertainty and external disturbances. The performance of monitoring and control is verified by quantitative analysis. The goals of this paper are towards access to adequate, safe and affordable housing and basic services, promotion of inclusive and sustainable urbanization and participation, implementation of sustainable and disaster-resilient buildings, sustainable human settlement planning and manage. Therefore, the goal is believed to achieved in the near future by the ongoing development of AI and control theory.

Effect of local joint flexibility on the fatigue lfe assessment of jacket-type offshore platform

  • Behrouz Asgarian;Parviz Kuzehgar;Pooya Rezadoost
    • Ocean Systems Engineering
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    • 제14권1호
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    • pp.1-16
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    • 2024
  • This paper investigates the impact of local joint flexibility (LJF) on the fatigue life of jacket-type offshore platforms. Four sample platforms with varying geometric properties are modeled and analyzed using the Opensees software. The analysis considers the LJF of tubular joints through the equivalent element and flexible link approaches, and the results are compared to rigid modeling. Initially, modal analysis is conducted to examine the influence of LJF on the frequency content of the structure. Subsequently, fatigue analysis is performed to evaluate the fatigue life of the joints. The comparison of fatigue life reveals that incorporating LJF leads to reduced fatigue damage and a significant increase in the longevity of the joints in the studied platforms. Moreover, as the platform height increases, the effect of LJF on fatigue damage becomes more pronounced. In conclusion, considering LJF in fatigue analysis provides more accurate results compared to conventional methods. Therefore, it is essential to incorporate the effects of LJF in the analysis and design of offshore jacket platforms to ensure their structural integrity and longevity.

객체지향 DBMS 기능 시험 도구의 프로토타입 개발 (Development of an OODBMS Functionality Testing Tool Prototype.)

  • 김은영;이상호;전성택
    • 정보기술과데이타베이스저널
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    • 제2권2호
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    • pp.25-34
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    • 1995
  • 본 논문에서는 멀티미디어 처리를 제공하는 객체지향 데이타베이스 시스템에 관한 기능 시험도구의 설계 전략에 대하여 설명한다. 시험도구의 설계시 시험 데이터베이스의 스키마는 추상화, 상속, 집단화(aggregation) 등의 객체 지향적인 성질을 시험할 수 있도록 하며, 포함되는 인스턴스는 사용자의 이해를 돕기 위해 의미있는 값으로 인위적으로 구성한다. 기능 시험항목은 경계값 분석, 동치 분할 등의 기법을 이용한 블랙박스 시험방법으로 작성되며, 각 시험항목은 서로 독립적으로 구현되어 실행 순서에 영향받지 않도록 한다. 시험항목이 수행된 후에는 성공적인 수행, 제외된 기능, 올바르지 않은 수행 등의 시험결과에 대한 목록이 출력되도록 한다. 이러한 설계 전략에 의하여 UniSQL/X를 위한 기능 시험도구를 C++로 개발하였다. 시험도구의 수행은 스키마의 생성, 인스턴스 삽입, 시험프로그램의 컴파일과 링크, 시험프로그램 실행 및 결과확인, 시험 데이타베이스 제거 순으로 이루어진다. 본 시험도구는 UniSQL/C++의 멤버 함수에 대응하는 90여개의 시험프로그램을 이용하여 140여개의 시험항목을 제공한다.

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LC형 다중 위상 PLL 이용한 40Gb/s $0.18{\mu}m$ CMOS 클록 및 데이터 복원 회로 (40Gb/s Clock and Data Recovery Circuit with Multi-phase LC PLL in CMOS $0.18{\mu}m$)

  • 하기혁;이정용;강진구
    • 대한전자공학회논문지SD
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    • 제45권4호
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    • pp.36-42
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    • 2008
  • 본 논문은 광통신-시리얼 링크를 위한 40Gb/s 클록 및 데이터 복원 회로의 설계를 제안한다. 설계된 본 회로는 다중 위상을 생성하는 LC 탱크 PLL을 이용하여 8개의 샘플링 클록을 생성하고 $2{\times}$ 오버샘플링 구조의 뱅-뱅 위상 검출기를 이용하여 데이터와 클록의 위상을 조정한다. 40Gb/s의 입력 데이터가 샘플링을 거쳐서 1:4 디멀티플렉싱되어 4채널에 10Gb/s 출력으로 복원되는 구조로서 디지털과 아날로그의 전원을 분리하여 설계가 진행되었다. 인덕터를 사용하여 칩면적은 $2.8{\times}2.4mm^2$을 차지하고 전력소모는 약 200mW이다. 0.18um CMOS공정으로 칩 제작후 측정결과 채널당 악 9.5Gb/s 출력이 측정되었다(직렬입력 약 38Gb/s 해당).