• Title/Summary/Keyword: envelope detector

Search Result 30, Processing Time 0.025 seconds

Effects of cyclic mean pressure of helium gas on performance of integral crank driven stirling cryocooler

  • Hong, Yong-Ju;Ko, Junseok;Kim, Hyo-Bong;Park, Seong-Je
    • Progress in Superconductivity and Cryogenics
    • /
    • v.18 no.3
    • /
    • pp.30-34
    • /
    • 2016
  • An integral crank driven Stirling cryocooler is solidly based on concepts of direct IR detector mounting on the cryocooler's cold finger, and the integral construction of the cryocooler and Dewar envelope. Performance factors of the cryocooler depend on operating conditions of the cryocooler such as a cyclic mean pressure of the working fluid, a rotational speed of driving mechanism, a thermal environment, a targeted operation temperature and etc.. At given charging condition of helium gas, the cyclic mean pressure of helium gas in the cryocooler changes with temperatures of the cold end and the environment. In this study, effects of the cyclic mean pressure of helium gas on performances of the Stirling cryocooler were investigated by numerical analyses using the Sage software. The simulation model takes into account thermodynamic losses due to an inefficiency of regenerator, a pressure drop, a shuttle heat transfer and solid conductions. Simulations are performed for the performance variation according to the cyclic mean pressure induced by the temperature of the cold end and the environment. This paper presents P-V works in the compression and expansion space, cooling capacity, contribution of losses in the expansion space.

Intelligent AGC Circuit Design (지능형 AGC 회로 설계)

  • Zhang Liang;Kim Jong-Won;Seo Jae-Yong;Cho Hyun-Chan;Jeong Goo-Chul
    • Proceedings of the Korean Institute of Intelligent Systems Conference
    • /
    • 2006.05a
    • /
    • pp.302-305
    • /
    • 2006
  • A problem that arises in most communication receivers concerns the wide variation in power level of the signals received at the antenna. These variations cause serious problems which can usually be solved in receiver design by using Automatic Gain Control (AGC). AGC is achieved by using an amplifier whose gain can be controlled by external current or voltage. However, the AGC circuit does not respond to rapid changes in the amplitude of input. If input changes instantaneously, then even if op-amps could follow the change, the envelope detector capacitor could not, since the capacitor's voltage could not change instantaneously. To alleviate this deficiency, we present Improved Automatic Gain Control Circuit (IAGCC) replacing AGC circuit to FLC.

  • PDF

Performance of 2-Carrier DS system and its MODEM designed for Power Line Transmission (전력선 통신을 위한 2-반송파 DS방식의 특성과 MODEM의 구현)

  • 김인태;이무영
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.19 no.3
    • /
    • pp.582-590
    • /
    • 1994
  • This paper introduce a highly verstile and simple data transmission system designed for commercial power distribution lines. The system operates on the DSSS principle but utilizes two independent carrier frequencies each represents polarity of DS MODEM outiputs. At the receiving terminal, outputs of two envelope detectors are directly applied to separate DS correlators before the two components are compared. The recovered signals which represents data and line noise are then compared at comparator. With the noise power greatly rudused at the correlator, the error rate of the data observed at comparator desplays great improvement comparing to the conventional FSK-DS system in which the detector output are compared before the correlator stage. Despite its simplest structure, the prototype MODEM transmitts 2400 bps with the error rate 10 , about 10dB improved compared to conventional FSK system.

  • PDF

Ultrasonic Images Enhancement of the SS Reference Specimen and the Reference Calibration Block for NPPs by the Combining Bases of Support for Spatial Frequency (공간주파수대역에서 기저대역 확장을 통한 원전 대비시험편과 대비 보정 시험편의 초음파 영상 개선)

  • Park, Chi-Seung;Kim, Seon-Jin
    • Korean Journal of Materials Research
    • /
    • v.13 no.10
    • /
    • pp.651-657
    • /
    • 2003
  • Ultrasonic microscope has been used to detect the defects on surface or inner solid. Conventionally, it has used at a single operating frequency. The resolution and quality of the measured images are determined by a characteristic of the transducer of the ultrasonic microscope. The conventional ultrasonic microscope has been used envelope detector to detect the amplitude of reflected signal, but the changes in amplitude is not sensitive enough for specimen with microstructure that in phase. In this paper, we have studied multi-frequency depth resolution enhancement with ultrasonic reflection microscope for the reflectors of a stainless steel reference specimen and a reference calibration block to be used as the material in nuclear power plants for ISI, PSI. Increased depth resolution can be obtained by taking two, three-dimensional images at more that one frequency and numerically combining the results. As results of the experiment, we could get enhanced images with the rate of contrast in proportion and high quality signal distribution for the image to the changing rate of depth for the reflectors of the two kinds of specimens.

RF Predistortion Techniques using 2nd Harmonics and Difference Frequency for Linearization of Power Amplifier (전력 증폭기의 선형화를 위해 2차 고조파와 차주파수를 이용한 전치왜곡 기술)

  • 박진상;조경준;장동희;김종헌;이병제;김남영;이종철
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.14 no.4
    • /
    • pp.356-362
    • /
    • 2003
  • In this paper, we propose a predistortion technique which uses a novel combination of the second harmonic technique and the difference frequency technique to achieve independent control of the 3rd and 5th order intermodulation products generated by the PA. The second harmonic and difference frequency terms are generated using an envelope detector and two frequency multipliers. The RF predistorter has capability to independently control of the 3rd and 5th order intermodulation products so that high power amplifier is optimized for linear characteristics. From the measurement results, over the frequency band 2137.5 MHz to 2142.5 MHz, ACPR reduction of 11 dB is obtained for a single 30 dBm W-CDMA carrier.

The Analysis of Amplitude and Phase Image for Acoustic Microscope Using Quadrature Technique (쿼드러춰 방식에 의한 초음파현미경의 진폭과 위상영상 분석)

  • Kim, Hyun;Jun, Kye-Suk
    • The Journal of the Acoustical Society of Korea
    • /
    • v.18 no.3
    • /
    • pp.55-61
    • /
    • 1999
  • In this study, we have constructed the acoustic microscope using quadrature technique and analyzed the relative variation of image intensity and the quality of image by reconstructing the amplitude and phase image for surface defects with tiny hight variation. In this experiment, we have constructed the scanning acoustic microscope using the focused transducer with 3㎒ center frequency and the quadrature detector. And we have fabricated aluminum samples with round defects whose depth is different and reconstructed the amplitude and phase images for the samples. One sample has round defects with 2㎜ diameter and 100㎛ depth and the other has round defects with 4㎜ diameter and 5㎜ depth. In the result of line scanning for the sample with 100㎛ round defects, it has been shown that the variation rate of amplitude image intensity is 7% and the variation rate of phase image intensity is 89%. The phase image has better contrast than amplitude image for the sample. In contrast to this, the amplitude image has better contrast than phase image for the sample with 5㎜ depth's defects. Accordingly there is big difference between amplitude image and phase image for depth variation of defects whose boundary is 1 wavelength. Consequently the acoustic microscope using quadrature detector can be evaluated efficiently more than using envelope detector, for detecting defects which have height variation less than 1 wavelength. And also the phase image and the amplitude image can be used for detecting defects of tiny height variation with complimentary relation.

  • PDF

A UTMI-Compatible USB2.0 Transceiver Chip Design (UTMI 표준에 부합하는 USB2.0 송수신기 칩 설계)

  • Nam Jang-Jin;Kim Bong-Jin;Park Hong-June
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.42 no.5 s.335
    • /
    • pp.31-38
    • /
    • 2005
  • The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

A 900 MHz RFID Receiver with an Integrated Digital Data Slicer (디지털 데이터 슬라이서가 집적된 900 MHz 대역의 RFID 수신단)

  • Cho, Younga;Kim, Dong-Hyun;Kim, Namhyung;Rieh, Jae-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.26 no.1
    • /
    • pp.63-70
    • /
    • 2015
  • In this paper, a receiver has been developed in a $0.11-{\mu}m$ CMOS technology for 900 MHz RFID communication system applications. The receiver is composed of an envelope detector, a low-pass-filter, a comparator, D flip-flops, as well as an oscillator to provide the clock for digital blocks. The receiver is designed for low power consumption, which would be suitable for passive RFID tags. In this circuit, a digital data slicer was employed instead of the conventional analog data slicer in order to reduce the power consumption. The clock frequency is 1.68 MHz and the circuit operates with a power consumption as small as $5{\mu}W$. The chip size is $325{\mu}m{\times}290{\mu}m$ excluding the probing pads.

The Phase Difference Measurement Module Development for Amplitude Modulated Range Measurement System (진폭 변조 거리 측정 시스템을 위한 정밀 위상차 측정부 개발)

  • Noh, Hyoung-Woo;Park, Jeong-Ho;Kang, Il-Heung;Choi, Mun-Gak;Kim, Kang-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.22 no.2
    • /
    • pp.182-190
    • /
    • 2011
  • A amplitude modulation(AM) range measuring system utilizes the phase difference of the modulated envelope of the reflected signal to measure the distance. It is known that the AM system has a problem in accuracy due to antenna leakage signals and spurious reflection signals, but an AM range measurement system using an active reflector, which shifts the frequency bands, has been proposed in order to minimize the measurement errors due to spurious signals. In this paper, a new phase measurement module for the AM range measurement system, which enables to measure long distance with good accuracy, is proposed. The modulation frequency is alternatively selected between 8 and 1 MHz, and the measured distance range with this module is up to 150 m within 2 cm accuracy. A JK flip-flop circuit is used for higher phase accuracy, and an XOR circuit is used to cover long distance.

RF Capacitive Coupling Link for 3-D ICs (3-D 집적회로용 RF 커패시티브 결합 링크)

  • Choi, Chan-Ki;Cui, Chenglin;Kim, Seong-Kyun;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.10
    • /
    • pp.964-970
    • /
    • 2013
  • This paper presents a bandpass wireless 3-D chip to chip interface technique. The proposed technique uses direct amplitude modulation of the free running oscillator which especially utilizes the coupling capacitance between two stacked chips as a part of the resonator. Therefore, the oscillator is three dimensionally configured and a simple envelope detector can be used as a receiver without any additional matching circuitry. The proposed link was designed and fabricated using 110 nm CMOS technology and experimental results successfully showed the data transmission at a data rate of 2 Gb/s for the stacked chips with a thickness of 50 ${\mu}m$ consuming 4.32 mW. The sizes of the Tx and Rx chips are 0.045 $mm^2$ and 0.029 $mm^2$, respectively.