• Title/Summary/Keyword: embedded data

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Acceleration Techniques of Application Startup for Embedded Systems (임베디드 환경에서 응용프로그램 시작의 가속 기법)

  • Park, Eun-Byung;Lee, Yong-Jun;Kim, Seungkyun;Lee, Jaejin;Park, Kyungmin
    • IEMEK Journal of Embedded Systems and Applications
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    • v.4 no.4
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    • pp.174-179
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    • 2009
  • Due to digital convergence, mobile embedded systems need more functionalities and a fully fledged OS. Applications for such embedded systems are linked with many shared libraries available in the OS and access a large data set at launch time. This results in increased application launch time. In this paper, we propose two techniques for reducing the application launch time: lazy-loading and pinning. Lazy-loading defers loading shared libraries that are not used in the application at launch time, whereas pinning guarantees the residence of shared libraries and data used at launch time in the main memory.

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An Implementation of Clock Synchronization in FPGA Based Distributed Embedded Systems Using CDR (CDR을 사용한 FPGA 기반 분산 임베디드 시스템의 클록 동기화 구현)

  • Song, Jae-Min;Jung, Yong-Bae;Park, Young-Seak
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.4
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    • pp.239-246
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    • 2017
  • Time synchronization between distributed embedded systems in the Real Time Locating System (RTLS) based on Time Difference of Arrival (TDOA) is one of the most important factors to consider in system design. Clock jitter error between each system causes many difficulties in maintaining such a time synchronization. In this paper, we implemented a system to synchronize clocks between FPGA based distributed embedded systems using the recovery clock of CDR (clock data recovery) used in high speed serial communication to solve the clock jitter error problem. It is experimentally confirmed that the cumulative time error that occurs when the synchronization is not performed through the synchronization logic using the CDR recovery clock can be completely eliminated.

A Real-Time Embedded Speech Recognition System

  • Nam, Sang-Yep;Lee, Chun-Woo;Lee, Sang-Won;Park, In-Jung
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.690-693
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    • 2002
  • According to the growth of communication biz, embedded market rapidly developing in domestic and overseas. Embedded system can be used in various way such as wire and wireless communication equipment or information products. There are lots of developing performance applying speech recognition to embedded system, for instance, PDA, PCS, CDMA-2000 or IMT-2000. This study implement minimum memory of speech recognition engine and DB for apply real time embedded system. The implement measure of speech recognition equipment to fit on embedded system is like following. At first, DC element is removed from Input voice and then a compensation of high frequency was achieved by pre-emphasis with coefficients value, 0.97 and constitute division data as same size as 256 sample by lapped shift method. Through by Levinson - Durbin Algorithm, these data can get linear predictive coefficient and again, using Cepstrum - Transformer attain feature vectors. During HMM training, We used Baum-Welch reestimation Algorithm for each words training and can get the recognition result from executed likelihood method on each words. The used speech data is using 40 speech command data and 10 digits extracted form each 15 of male and female speaker spoken menu control command of Embedded system. Since, in many times, ARM CPU is adopted in embedded system, it's peformed porting the speech recognition engine on ARM core evaluation board. And do the recognition test with select set 1 and set 3 parameter that has good recognition rate on commander and no digit after the several tests using by 5 proposal recognition parameter sets. The recognition engine of recognition rate shows 95%, speech commander recognizer shows 96% and digits recognizer shows 94%.

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Design and Implementation Embedded XML Document DataBase Management System (내장형 XML문서 데이터베이스 관리 시스템의 설계 및 구현)

  • Ahn Byung-Tae;Seo Ik-Jin
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.6 s.38
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    • pp.103-116
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    • 2005
  • With embedded computing technology makes progress , various applications have been developing in PDA. And information exchanging through U document is underway actively between applications in internet environment. But most of the embedded system has Poor hardware resource. And embedded system uses own file system for XML document management. For reason of, it occurs to many of difficulties of data share and information exchange among other systems. Therefore, an importance of the XML Document Database Management System is on the rise in the embedded system. In this Paper, we design and implement Embedded XML Document Database Management System(EXDMS) for efficiently management of XML document and supporting data sharing and information exchanging through XML document in embedded system. As compared with file system, EXDMS shows results that more excellent performance about expandability and compatibility of application. Also, EXDMS has an excellent data Processing performance in poor system environment.

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Web-based Servo Motor Controller Design with Real-time Micro Embedded Operating System

  • Kim, Ga-Gue;Lee, Hyung-Seok
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.1655-1658
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    • 2004
  • In this paper, we design and implement remote servo motor control system with real-time micro embedded operating system. The system, where controller and camera image grabber are mounted, handles control commands transmitted from a remote PC web browser. A hard real-time servo motor driver running on the real-time micro embedded OS and then a digital control application which confirms precise sampling time intervals is constructed. Frame grabber images transmitted from camera are saved in a image data format to view on remote PC web browser.

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A Cost-effective 60Hz FHD LCD Using 800Mbps AiPi Technology

  • Nam, Hyoung-Sik;Oh, Kwan-Young;Kim, Seon-Ki;Kim, Nam-Deog;Kim, Sang-Soo
    • Journal of Information Display
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    • v.10 no.1
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    • pp.37-44
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    • 2009
  • AiPi technology incorporates an embedded clock and control scheme with a point-to-point bus topology, thereby having the smallest possible number of interface lines between a timing controller and column drivers. A point-to-point architecture boosts the data rate and reduces the number of interface lines, because impedance matching can be easily achieved. An embedded clock and control scheme is implemented by means of multi-level signalling, which results in a simple clock/data recovery circuitry. A 46" AiPi-based 10-bit FHD prototype requires only 20 interface lines, compared to 38 lines for mini-LVDS. The measured maximum data rate per data pair is more than 800 Mbps.

Efficient Utilization of Burst Data Transfers of DMA (직접 메모리 접근 장치에서 버스트 데이터 전송 기능의 효과적인 활용)

  • Lee, Jongwon;Cho, Doosan;Paek, Yunheung
    • IEMEK Journal of Embedded Systems and Applications
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    • v.8 no.5
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    • pp.255-264
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    • 2013
  • Resolving of memory access latency is one of the most important problems in modern embedded system design. Recently, tons of studies are presented to reduce and hide the access latency. Burst/page data transfer modes are representative hardware techniques for achieving such purpose. The burst data transfer capability offers an average access time reduction of more than 65 percent for an eight-word sequential transfer. However, solution of utilizing such burst data transfer to improve memory performance has not been accomplished at commercial level. Therefore, this paper presents a new technique that provides the maximum utilization of burst transfer for memory accesses with local variables in code by reorganizing variables placement.

Reducing Power Consumption of Data Caches for Embedded Processors (임베디드 프로세서를 위한 선인출 데이터캐시의 저전력화 방안)

  • Moon, Hyun-Ju;Jee, Sung-Hyun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.1
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    • pp.1-9
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    • 2007
  • Since data caches used in modern embedded processors consume significant fraction of total processor power up to 40%, embedded processors need power-efficient high performance data caches. This paper proposes a prefetching data cache structure which pursuing low power consumption. We added tag history table on existing data cache structure which includes hardware unit for data prefetching so that reduce the number of parallel lookup on tag memory. This strategic cache structure remarkably reduces power consumption for parallel tag lookup. Experimental results show that the proposed cache architecture induce low power consumption while maintain the same cache performance.

An XML Document Data Synchronization System Based on Embedded XML Database (내장형 XML 데이터베이스를 기반으로 한 XML 문서 데이터 동기화 시스템)

  • Sim Myoung-Sun;Bae Byoung-Jin;Min Jeong-Hoon;Ahn Byoung-Tae;Kang Hyun-Syug
    • Journal of Korea Multimedia Society
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    • v.8 no.9
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    • pp.1153-1162
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    • 2005
  • In this paper, we developed an XML Document Data Synchronization System for java(XDS4j) based on both SyncML(Synchronization Markup Language) framework Sync4j and embedded database system Berkeley DB XML. Because most existing data synchronization systems are based on file systems, data synchronization times at Fast Sync in those systems are very delayed. In the XDS4j, however, XML documents data produced at SyncML client and SyncML server are managed by embedded database system, and also synchronization time at Fast Sync is reduced because only partial elements are accessed by applying to XPath.

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