IEMEK Journal of Embedded Systems and Applications (대한임베디드공학회논문지)

Institute of Embedded Engineering of Korea (대한임베디드공학회)
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An Implementation of Clock Synchronization in FPGA Based Distributed Embedded Systems Using CDR

CDR을 사용한 FPGA 기반 분산 임베디드 시스템의 클록 동기화 구현

  • Received : 2017.03.16
  • Accepted : 2017.07.08
  • Published : 2017.08.31
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Abstract

Time synchronization between distributed embedded systems in the Real Time Locating System (RTLS) based on Time Difference of Arrival (TDOA) is one of the most important factors to consider in system design. Clock jitter error between each system causes many difficulties in maintaining such a time synchronization. In this paper, we implemented a system to synchronize clocks between FPGA based distributed embedded systems using the recovery clock of CDR (clock data recovery) used in high speed serial communication to solve the clock jitter error problem. It is experimentally confirmed that the cumulative time error that occurs when the synchronization is not performed through the synchronization logic using the CDR recovery clock can be completely eliminated.

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References

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