• 제목/요약/키워드: electronics

검색결과 71,406건 처리시간 0.065초

MOCVD TiN FOR HIGH TEMPERATURE PROCESS

  • Lee, Sang-Hyeob;Kim, Jeong-Tae;Seo, Hwan-Seok;Chae, Moo-Sung;Kim, Sam-Dong
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
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    • pp.153.2-153
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    • 1998
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Research and Development of High Performance 50-inch HD Plasma Display Panel

  • Choi, Kwang-Yeol;Min, Woong-Kee;Rhee, Byung-Joon;Ahn, Byung-Nam;Kim, Je-Seok;Moon, Won-Seok;Park, Min-Soo;Ryu, Byung-Gil;Kim, Sung-Tae;Ahn, Young-Joon;Yang, Sung-Soo;Kim, Kyung-Tae;Lee, Kyu-Sung
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1547-1550
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    • 2008
  • We are suggesting a new index to represent the performance of PDP, such as Specific Performance Index (SPI) that includes luminous efficacy and panel reflectance. High Xe gas mixture and low panel capacitance are well known as key factors to improve luminous efficacy of PDP [1]. However, higher driving voltage and longer discharge time lag is an obstacle when applying these technologies. Modified cell design, new materials and driving waveform enable us to overcome these obstacles. High efficient phosphor is also a key material to improve luminous efficacy. Phosphors coated with pigment are used to reduce panel reflectance. High performance 50-inch HD PDP with luminous efficacy of 2.3 lm/W has been developed.

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Parasitic Capacitive Housing Effects in a Multi-Lamps Backlight

  • Kim, Sang-Beom;Cho, Mee-Ryoung;Hong, Seong-Moon;Lee, Yong-Kon;Lee, Sang-Heok;Lee, Ji-Hoon;Lee, Joo-Young;Hong, Jin-Woo;Yang, Dong-Wook;Lee, Dea-Heung;Kim, Bong-Soo;Kang, June-Gill;Cho, Guang-Sup
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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    • pp.639-641
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    • 2003
  • The parasitic capacitance between the high voltage electrodes and the backlight housing causes lowering lamp current, electric power leakage, and leading to lower brightness and efficiency in a multi-lamps backlight. In this study a new center balance swing operation method is introduced to be minimizing those housing effects.

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Highly Manufacturable 65nm McFET (Multi-channel Field Effect Transistor) SRAM Cell with Extremely High Performance

  • Kim, Sung-Min;Yoon, Eun-Jung;Kim, Min-Sang;Li, Ming;Oh, Chang-Woo;Lee, Sung-Young;Yeo, Kyoung-Hwan;Kim, Sung-Hwan;Choe, Dong-Uk;Suk, Sung-Dae;Kim, Dong-Won;Park, Dong-Gun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권1호
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    • pp.22-29
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    • 2006
  • We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

Low Voltage Program/Erase Characteristics of Si Nanocrystal Memory with Damascene Gate FinFET on Bulk Si Wafer

  • Choe, Jeong-Dong;Yeo, Kyoung-Hwan;Ahn, Young-Joon;Lee, Jong-Jin;Lee, Se-Hoon;Choi, Byung-Yong;Sung, Suk-Kang;Cho, Eun-Suk;Lee, Choong-Ho;Kim, Dong-Won;Chung, Il-Sub;Park, Dong-Gun;Ryu, Byung-Il
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제6권2호
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    • pp.68-73
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    • 2006
  • We propose a damascene gate FinFET with Si nanocrystals implemented on bulk silicon wafer for low voltage flash memory device. The use of optimized SRON (Silicon-Rich Oxynitride) process allows a high degree of control of the Si excess in the oxide. The FinFET with Si nanocrystals shows high program/erase (P/E) speed, large $V_{TH}$ shifts over 2.5V at 12V/$10{\mu}s$ for program and -12V/1ms for erase, good retention time, and acceptable endurance characteristics. Si nanocrystal memory with damascene gate FinFET is a solution of gate stack and voltage scaling for future generations of flash memory device. Index Terms-FinFET, Si-nanocrystal, SRON(Si-Rich Oxynitride), flash memory device.

Flexible E-Paper Displays Using Low-Temperature Process and Printed Organic Transistor Arrays

  • Jin, Yong-Wan;Kim, Joo-Young;Koo, Bon-Won;Song, Byong-Gwon;Kim, Jung-Woo;Kim, Do-Hwan;Yoo, Byung-Wook;Lee, Ji-Youl;Chun, Young-Tea;Lee, Bang-Lin;Jung, Myung-Sup;Park, Jeong-Il;Lee, Sang-Yoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.431-433
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    • 2009
  • We developed 4.8 inch WQVGA e-paper on plastic substrate using organic field effect transistors (OFETs). Polyethylene naphthalate (PEN) film was used as a flexible substrate and arrays of OFETs with bottom-gate, bottom-contact structure were fabricated on it. Lowtemperature curable organic gate insulating materials were employed and polymer semiconductor solutions were ink-jetted on arrays with high-resolution. At all steps, process temperature was limited below $130^{\circ}C$. Finally, we could drive flexible e-paper displays based on OFET arrays with the resolution of 100 dpi.

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