• Korean Journal of Food Science and Technology
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• v.33 no.6
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• pp.720-727
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• 2001

This study was carried to investigate the changes in physical and chemical properties of Yukwa during preparation with addition of antioxidants and to develop its storage condition. Antioxidants (tocopherol and Oxyfos) were used in syrup coating and the packaging materials used were PET/EVOH $(16\;{\mu}m)/PL$ : P1 and PET/EVOH $(24\;{\mu}m)/PL$ : P2 (YOP1: P1 with Oxyfos, YOP2 : P2 with Oxyfos, YTP1 : P1 with tocopherol, YTP2 : P2 with tocopherol). Color values measured for Yukwa showed that L values of YOP1, YOP2, YTP1 and YTP2 were changed little during storage while a and b values of YOP1, YOP2, YTP1 and YTP2 were slightly decreased. Hardness and chewiness in textural properties were also decreased during storage. Yukwa packed in YOPl and YOP2 maintained less than 40 in peroxide value during for 12 weeks of storage period. The major fatty acid composition of frying oil were linoleic acid (54.2%), oleic acid (23.4%), palmitic acid (11.3%), linolenic acid (6.5%) and stearic acid (4.6%). There was no difference in composition of fatty acid during storage. Sensory evaluation (Yukwa odor and rancid odor) showed very similar results with determined by electronic nose. YTP1 and YTP2 had maintained sensory characteristics of Yukwa during 10 weeks storage.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.4
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• pp.23-29
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• 2000

We demonstrate the fabrication method of high-density and high-quality solder bump solving a copper (Cu) cross-contamination in Si-LSI laboratory. The Cu cross-contamination is solved by separating solder-bump process by two steps. Former is via-formation process excluding Cu/Ti under ball metallurgy (UBM) layer sputtering in Si-LSI laboratory. Latter is electroplating process including Ti-adhesion and Cu-seed layers sputtering out of Si-LSI laboratory. Thick photoresist (PR) is achieved by a multiple coating method. After TiW/Al-electrode sputtering for electroplating and via formation in Si-LSI laboratory, Cu/Ti UBM layer is sputtered on sample. The Cu-seed layer on the PR is etched during Cu-electroplating with low-electroplating rate due to a difference in resistance of UBM layer between via bottom and PR. Therefore Cu-buffer layer can be electroplated selectively at the via bottom. After etching the Ti-adhesion layer on the PR, Sn/Pb solder layer with a composition of 60/40 is electroplated using a tin-lead electroplating bath with a metal stoichiometry of 60/40 (weight percent ratio). Scanning electron microscope image shows that the fabricated solder bump is high-uniformity and high-quality as well as symmetric mushroom shape. The solder bumps with even 40/60 $\mu\textrm{m}$ in diameter/pitch do not touch during electroplating and reflow procedures. The solder-bump process of high-uniformity and high-density with the Cu cross-contamination free in Si-LSI laboratory will be effective for electronic microwave application.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.49-55
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• 2011

The failure of electronic instruments is mostly caused by heat and shock. This shock causes the crack initiation at the solder joint interface of PCB component which is closely related with the formation of intermetallic compound(IMC). The Ag content in Pb-free Sn-xAg-0.5Cu solder alloy used in this study was 1.0, 1.2 and 3.0 wt.%, respectively. After soldering with PCB component, isothermal aging was performed to 1000 hrs. The growth of IMC layer was observed during isothermal aging. The drop impact property of solder joint was evaluated by impact bending test method. The solder joint made with the solder containing lower Ag content showed better impact bending property compared with that with higher Ag content. On the contrary to this result, the solder joint made with solder containing higher Ag content showed better impact bending property after aging. It should be caused by the formation of fine $Ag_3Sn$, which relieved the impact. It showed consequently the different effect of fine $Ag_3Sn$ and coarse $Cu_6Sn_5$ particles formed in the IMC layer on the impact bending property.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.4
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• pp.77-82
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• 2014

Stretchable electrodes are focused due to many demands for soft electronics. One of the candidates, carbon black composites have advantages of low cost, easy processing and decreasing resistivity in a certain range during stretching. However, the electrical conductivity of carbon black composites is not enough for electronic devices. Graphene is 2-dimensional nanostructured carbon based material which shows good electrical properties and flexibility. They may help to improve electrical conductivity of the carbon black composites. In this study, graphene was added to a carbon black electrode to enhance electrical properties and investigated. Electrical resistivity of graphene added carbon electrode decreased comparing with that of carbon black electrode because graphene bridged non-contacting carbon black aggregates to strengthen the conductive network. Also graphene reduced an increase in the resistance of the carbon black electrode applied to strain because they connected gap of separated carbon black aggregates and aligned along the stretching direction at the same time. In conclusion, an addition of graphene to carbon black gives two benefits on the electrical properties of carbon black composite as a stretchable electrode.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.2 s.43
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• pp.17-21
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• 2007

Dense and periodic arrays of holes and Si nano dots were fabricated on silicon substrate. The nanopatterned holes were approximately $15{\sim}40nm$ wide, 40 nm deep and $40{\sim}80\;nm$ apart. To obtain nano-size patterns, self?assembling diblock copolymer were used to produce layer of hexagonaly ordered parallel cylinders of polymethylmethacrylate (PMMA) in polystyrene(PS) matrix. The PMMA cylinders were degraded and removed with acetic acid rinse to produce a PS. $100\;{\AA}-thick$ Au thin film was deposited by using e-beam evaporator. PS template was removed by lift-off process. Arrays of Au nano dots were transferred by using Fluorine-based reactive ion etching(RE). Au nano dots were removed by sulfuric acid. Si nano dots size and height were $30{\sim}70\;nm$ and $10{\sim}20\;nm$ respectively.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.1
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• pp.103-111
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• 2017

In this study, the thermomechanical stress and fatigue analysis of a high voltage and high current (3,300 V/1200 A) insulated gate bipolar transistor (IGBT) module used for electric locomotive applications were performed under thermal cycling condition. Especially, the reliability of the copper wire and the ribbon wire were compared with that of the conventional aluminum wire. The copper wire showed three times higher stress than the aluminum wire. The ribbon type wire showed a higher stress than the circular type wire, and the copper ribbon wire showed the highest stress. The fatigue analysis results of the chip solder connecting the chip and the direct bond copper (DBC) indicated that the crack of the solder mainly occurred at the outer edge of the solder. In case of the circular wire, cracking of the solder occurred at 35,000 thermal cycles, and the crack area in the copper wire was larger than that of the aluminum wire. On the other hand, when the ribbon wire was used, the crack area was smaller than that of the circular wire. In case of the solder existing between DBC and base plate, the crack growth rate was similar regardless of the material and shape of the wire. However, cracking occurred earlier than chip solder, and more than half of the solder was failed at 40,000 cycles. Therefore, it is expected that the reliability of the solder between DBC and base plate would be worse than the chip solder.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.55-59
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• 2018

In this paper, we investigated the characteristics of shear stress type piezoresistor on a diaphragm structure formed by MEMS (Microelectromechanical System) technology of silicon-direct-bonding (SDB) wafers with Si/$SiO_2$/Si-sub. The diaphragm structure formed by etching the backside of the wafer using a TMAH aqueous solution can be used for manufacturing various sensors. In this study, the optimum shape condition of the shear stress type piezoresistor formed on the diaphragm is found through ANSYS simulation, and the diaphragm structure is formed by using the semiconductor microfabrication technique and the shear stress formed by boron implantation. The characteristics of the piezoelectric resistance are compared with the simulation results. The sensing diaphragm was made in the shape of an exact square. It has been experimentally found that the maximum shear stress for the same pressure at the center of the edge of the diaphragm is generated when the structure is in the exact square shape. Thus, the sensing part of the sensor has been designed to be placed at the center of the edge of the diaphragm. The prepared shear stress type piezoresistor was in good agreement with the simulation results, and the sensitivity of the piezoresistor formed on the $2200{\mu}m{\times}2200{\mu}m$ diaphragm was $183.7{\mu}V/kPa$ and the linearity of 1.3 %FS at the pressure range of 0~100 kPa and the symmetry of sensitivity was also excellent.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.3
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• pp.43-50
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• 2014

By the trends of electronic package to be smaller, thinner and more integrative, the reliability of interconnection between Si chip and printed circuit board is required. This paper reports on a study of high speed shear energy of Sn-4.0wt%Ag-0.5wt%Cu (SAC405) solder joints with different the thicknesses of electroless Ni-P deposit. A high speed shear testing of solder joints was conducted to find a relationship between the thickness of Ni-P deposit and the brittle fracture in electroless Ni-P deposit/SAC405 solder. A focused ion beam (FIB) was used to polish the cross sections to reveal details of the microstructure of the fractured pad surface with and without $HNO_3$ vapor treatment. The high speed shear energy of SAC405 solder joint with $1{\mu}m$ Ni-P deposit was found to be lower without $HNO_3$ vapor, compared to those of over $3{\mu}m$ Ni-P deposit. This could be due to the edge of solder resist in $1{\mu}m$ Ni-P deposit, which provides a fracture location for the weakened shear energy of solder joints and brittle fracture in high speed shear test. With $HNO_3$ vapor, the brittle fracture mode in high speed shear test decreased with increasing the thickness of Ni-P deposit. Then the roughness (Ra) of Ni-P deposits decreased with increasing its thickness. Thus, this gives the evidence that the decrease in roughness of Ni-P deposit for Eelectroless Ni/ Electroless Pd/ Immersion Au (ENEPIG) surface play a critical role for improving the robustness of SAC405 solder joint.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.37-44
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• 2013

It is well known that thermal deformation of electronic packages with Pb-Sn solder and with lead-free solder is significantly affected by material properties consisting the package, as well as those of the solder itself. In this paper, the method for determining coefficient of thermal expansion(CTE) of new material is established by using temperature characteristic of strain gages, and the CTE of molding compound are obtained experimentally. The temperature-dependent CTE of molding compound for Pb-Sn solder and that for lead-free solder are obtained by using strain measurements with well known steel specimen and aluminium specimen as reference specimens, and the CTE's are also measured non-contactly by using moire interferometry. Those results are compared, and the agreement between the two types of strain gage experiment and the moire experiment show the strain gage method used in this paper to be reliable. In the case of the molding compound for Pb-Sn solder, the CTE is measured as approximately $15.8ppm/^{\circ}C$ regardless of the temperature. In the case for the lead-free solder, the CTE is measured as of approximately $9.9ppm/^{\circ}C$ below the temperature of $100^{\circ}C$, and then the CTE is increased sharply depending on the temperature, and reaches to $15.0ppm/^{\circ}C$ at $130^{\circ}C$.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.2
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• pp.67-72
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• 2012

In recent days, the wire width of IC is narrowed and the degree of integration of IC is increased to obtain the higher capacity of the devices in electronic industry. And then the surface quality of FCCL(Flexible Copper Clad Laminate) became increasingly important. Surface defects on FCCL are bump, scratch, dent and so on. In particular, bumps cause low reliability of the products. Even though there are bumps on the surface, if leveling characteristic of plating solution is good, it does not develop significant bump. In this study, the leveling characteristics of additives are investigated. The objective of study is to improve the leveling characteristic and reduce the surface step through additives and plating conditions. The additives in the electrodeposition bath are critical to obtain flat surface and free of defects. In order to form flat copper surface, accelerator, suppressor and leveler are added to the stock solution. The reason for the addition of leveler is planarization surface and inhibition of the formation of micro-bump. Levelers (SO(Safranin O), MV(Methylene Violet), AB(Alcian Blue), JGB(Janus Green B), DB(Diazine Black) and PVP(Polyvinyl Pyrrolidone) are used in copper plating solution to enhance the morphology of electroplated copper. In this study, the nucleation and growth behavior of copper with variation of additives are studied. The leveling characteristics are analyzed on artificially fabricated Ni bumps.