• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.52-58
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• 2006

Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

• Journal of Aerospace System Engineering
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• v.11 no.1
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• pp.1-7
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• 2017

While a satellite is carried into orbit by a launch vehicle, it is exposed to the severe launch environment with random vibrations and shock. Accordingly, these vibration sources affect electronic equipment, particularly the printed circuit board (PCB) in the satellite. When the launch load impacts the PCB, it causes negative behavior. This causes perpendicular bending around the boundary of fixation points that finally leads to the failure of solder joints, lead wires, and PCB cracks. To overcome these issues, the electronic equipment design must meet reliability requirements. In this paper, Steinberg's method is used to derive allowable and maximum deflection to verify design from a life perspective concerning the control board of the Antenna Pointing Driver (APD) mounted on KOMPSAT-3.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.8
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• pp.54-61
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• 2001

A fully on-chip open-drain CMOS output driver was designed for high bandwidth DRAMs, such that its output voltage swing was insensitive to the variations of temperature and supply voltage. An auto refresh signal was used to update the contents of the current control register, which determined the transistors to be turned-on among the six binary-weighted transistors of an output driver. Because the auto refresh signal is available in DRAM chips, the output driver of this work does not require any external signals to update the current control register. During the time interval while the update is in progress, a negative feedback loop is formed to maintain the low level output voltage ($V_OL$) to be equal to the reference voltage ($V_{OL.ref}$) which is generated by a low-voltage bandgap reference circuit. Test results showed the successful operation at the data rate up to 1Gb/s. The worst-case variations of $V_{OL.ref}$ and $V_OL$ of the proposed output driver were measured to be 2.5% and 7.5% respectively within a temperature range of $20^{\circ}C$ to $90^{\circ}C$ and a supply voltage range of 2.25V to 2.75V, while the worst-case variation of $V_OL$ of the conventional output driver was measured to be 24% at the same temperature and supply voltage ranges.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.4
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• pp.251-265
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• 2001

As the device scaling proceeds, the operating voltage(VDD) of giga-bit DRAMs is expected to be reduced to 1.5V or down, fir improving the device reliability and reducing the power dissipation. Therefore the low-voltage circuit design techniques are required to implement giga-bit DRAMs. In this work, state-of-art low-voltage DRAM circuit techniques are reviewed, and four kinds of low-voltage circuit design techniques are newly proposed for giga-bit DRAMs. Measurement results of test chips and SPICE simulation results are presented for the newly proposed circuit design techniques, which include a hierarchical negative-voltage word-line driver with reduced subthreshold leakage current, a two-phase VBB(Back-Bias Voltage) generator, a two-phase VPP(Boosted Voltage) generator and a bandgap reference voltage generator.

• Journal of Power Electronics
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• v.4 no.1
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• pp.39-45
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• 2004

A novel current-fed energy-recovery sustaining driver (CFERSD) for a PDP is proposed in this paper. Its main idea is to recover the energy stored in the PDP or to inject the input source energy to the PDP by using the current source built-up in the energy recovery inductor. This method provides zero-voltage-switching (ZVS) of all main power switches, the reduction of EMI, and more improved operational voltage margins with the aid of the discharge current compensation. In addition, since the current flowing through the energy recovery inductor can compensate the plasma discharge current flowing through the conducting power switches, the current stress through all main power switches can be considerably reduced. Furthermore, it features a low conduction loss and fast transient time. Operations, features and design considerations are presented and verified experimentally on a 1020${\times}$l06mm sized PDP, 50kHz-switching frequency, and sustaining voltage 140V based prototype.

• Journal of Power Electronics
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• v.14 no.2
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• pp.292-301
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• 2014

This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.

• ETRI Journal
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• v.27 no.2
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• pp.133-139
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• 2005

A monolithic microwave integrated circuit (MMIC) chip set consisting of a power amplifier, a driver amplifier, and a frequency doubler has been developed for automotive radar systems at 77 GHz. The chip set was fabricated using a 0.15 ${\mu}$ gate-length InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (mHEMT) process based on a 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20 dB from 76 to 77 GHz with 15.5 dBm output power. The chip size is 2mm${\times}$ 2mm. The driver amplifier exhibited a gain of 23 dB over a 76 to 77 GHz band with an output power of 13 dBm. The chip size is 2.1mm${\times}$ 2mm. The frequency doubler achieved an output power of -6 dBm at 76.5 GHz with a conversion gain of -16 dB for an input power of 10 dBm and a 38.25 GHz input frequency. The chip size is 1.2mm ${\times}$ 1.2mm. This MMIC chip set is suitable for the 77 GHz automotive radar systems and related applications in a W-band.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.6
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• pp.135-139
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• 2009

In order to cope with safety issues regarding fisher vessels, a device is required with the real-time monitoring for the safety and risk factors for a capability of informing and alerting function. In embedded modules, there is a trouble that we should design device drivers and application programs for usage of the multi-function sensors in order to detect risk factors. In this paper, we designed hardware circuit and implemented control program of the sensor part using PIC18F, in order to control and process the input and output data of multi-function sensors without device drivers and application programs. We confirmed the operation of multi-function sensor module to generate output data according to sensor operation.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2780-2782
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• 1999

Many electronic ballasts for low pressure discharge lamps as fluorescent lamps are produced and commercialized. However, the electronic ballasts for high pressure lamps are now in progress to because of poor reliability and high cost of production. To obtain the confidence of electronic ballasts, it is necessary to prolong the life time of output switches. A variable frequency driver for inverter switches that can control the magnitude of output current with temperature of switches was designed and simulated. A conditions for circuit design are 22kHz : standard frequency, $100^{\circ}C$: standard temperature, $I_{peak}$ : 0.76A, and $V_{peak}$ : 184V, respectively. By simulation, as the temperature exceed a standard temperature, the frequency was increased up to 40kHz. However, the current and voltage that flow through switchs were decreased to 0.507A and 121V at $150^{\circ}C$, respectively.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.463-464
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• 2008

As the demands of LCD and PDP TV are increasing, the high performance HVICs(High Voltage Gate Driver ICs) technology is becoming more necessary. In this paper, we designed the HVIC that has enhanced noise immunity and high driving capability. It can operate at 500KHz switching frequency and permit 600V input voltage. High-side level shifter is designed with noise protection circuit and schmitt trigger. Therefore it has very high dv/dt immunity, the maximum being 50V/ns. The HVIC was designed using $1{\mu}m$ BCD 650V process and verified by Spectre and PSpice of Cadence inc. simulation.