• 제목/요약/키워드: dishing

검색결과 54건 처리시간 0.037초

Effect of slurries on the dishing of Shallow Trench Isolation structure during CMP process

  • Lee, Hoon;Lim, Dae-Soon;Lee, Sang-Ick
    • 한국윤활학회:학술대회논문집
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    • 한국윤활학회 2002년도 proceedings of the second asia international conference on tribology
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    • pp.443-444
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    • 2002
  • The uniformity of field oxide is critical to isolation property of device in STI, so the control of field oxide thickness in STI-CMP becomes enormously important. The loss of field oxide in shallow trench isolation comes mainly from dishing and erosion in STI-CMP. In this paper, the effect of slurries on the dishing was investigated with both blanket and patterned wafers were selected to measure the removal rate, selectivity and dishing amount. Dishing was a strong function of pattern spacing and types of slurries. Dishing was significantly decreased with decreasing pattern spacing for both slurries. Significantly lower dishing with ceria based slurry than with silica based slurry were achieved when narrow pattern spacing were used. Possible dishing mechanism with two different slurries were discussed based on the observed experimental results.

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Dependence of Dishing on Fluid Pressure during Chemical Mechanical Polishing

  • Higgs III, C. Fred;Ng, Sum Huan;Zhou, Chunhong;Yoon, In-Ho;Hight, Robert;Zhou, Zhiping;Yap, LipKong;Danyluk, Steven
    • 한국윤활학회:학술대회논문집
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    • 한국윤활학회 2002년도 proceedings of the second asia international conference on tribology
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    • pp.441-442
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    • 2002
  • Chemical mechanical polishing (CMP) is a manufacturing process that uses controlled wear to planarize dielectric and metallic layers on silicon wafers. CMP experiments revealed that a sub-ambient film pressure developed at the wafer/pad interface. Additionally, dishing occurs in CMP processes when the copper-in-trench lines are removed at a rate higher than the barrier layer. In order to study dishing across a stationary wafer during polishing, dishing maps were created. Since dishing is a function of the total contact pressure resulting from the applied load and the fluid pressure, the hydrodynamic pressure model was refined and used in an existing model to study copper dishing. Density maps, highlighting varying levels of dishing across the wafer face at different radial positions, were developed. This work will present the results.

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텅스텐 CMP에서 디싱 및 에로젼 결함 감소에 관한 연구 (A Study on the Reduction of Dishing and Erosion Defects)

  • 정해도;박범영;김호윤;김형재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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    • pp.140-143
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    • 2004
  • Chemical mechanical polishing(CMP) is essential technology to secure the depth of focus through the global planarization of wafer. But a variety of defects such as contamination, scratch, dishing, erosion and corrosion are occurred during CMP. Especially, dishing and erosion defects increase the resistance because they decrease the interconnect section area, and ultimately reduce the life time of the semiconductor. Due to this dishing and erosion must be prohibited. The pattern density and size in chip have a significant influence on dishing and erosion occurred over-polishing. Decreasing of abrasive concentration results in advanced pattern selectivity which can lead the uniform removal in chip and decrease of over-polishing. The fixed abrasive pad was applied and tested to reduce dishing and erosion in this paper. Consequently, reduced dishing and erosion was observed in CMP of tungsten pattern wafer with proposed fixed abrasive pad and chemicals.

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텅스텐 CMP에서 디싱 및 에로젼 결함 감소에 관한 연구 (A Study on the Reduction of Dishing and Erosion Defects in Tungsten CMP)

  • 박범영;김호윤;김구연;김형재;정해도
    • 한국정밀공학회지
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    • 제22권2호
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    • pp.38-45
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    • 2005
  • Chemical mechanical polishing(CMP) has been widely accepted for the planarization of multi-layer structures in semiconductor fabrication. But a variety of defects such as abrasive contamination, scratch, dishing, erosion and corrosion are occurred during CMP. Especially, dishing and erosion defects increase the metal resistance because they decrease the interconnect section area, and ultimately reduce the lift time of the semiconductor. Due to this reason dishing and erosion must be prohibited. The pattern density and size in chip have a significant influence on dishing and erosion occurred by over-polishing. The fixed abrasive pad(FAP) was applied and tested to reduce dishing and erosion in this paper. The abrasive concentration decrease of FAP results in advanced pattern selectivity which can lead the uniform removal in chip and declining over-polishing. Consequently, reduced dishing and erosion was observed in CMP of tungsten pattern wafer with proposed FAP and chemicals.

STI-CMP공정에서 표면특성에 미치는 패턴구조 및 슬러리 종류의 효과 (Effect of pattern spacing and slurry types on the surface characteristics in 571-CMP process)

  • 이훈;임대순;이상익
    • 한국윤활학회:학술대회논문집
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    • 한국윤활학회 2002년도 제35회 춘계학술대회
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    • pp.272-278
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    • 2002
  • Recently, STI(Shallow Trench Isolation) process has attracted attention for high density of semiconductor device as a essential isolation technology. In this paper, the effect of pattern density, trench width and selectivity of slurry on dishing in STI CMP process was investigated by using specially designed isolation pattern. As trench width increased, the dishing tends to increase. At $20{\mu}m$ pattern size, the dishing was decreased with increasing pattern density Low selectivity slurry shows less dishing at over $160{\mu}m$ trench width, whereas high selectivity slurry shows less dishing at below $160{\mu}m$ trench width.

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수직하중에 의한 응력이 CMP 공정의 디싱에 미치는 영향 (Investigation of the Relationship Between Dishing and Mechanical Stress During CMP Process )

  • 김형구;김승현;김민우;임익태
    • 반도체디스플레이기술학회지
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    • 제22권2호
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    • pp.30-34
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    • 2023
  • Since dishing in the CMP process is a major factor that hinders the uniformity of the semiconductor thin film, many studies have focused this issue to improve the non-uniformity of the film due to dishing. In the metal layer, the dishing mainly occurs in the central part of the metal due to a difference in a selection ratio between the metal and the dielectric, thereby generating a step on the surface of the metal layer. Factors that cause dishing include the shape of the thin film, the chemical reaction of the slurry, thermal deformation, and the rotational speed of the pad and head, and dishing occurs due to complex interactions between them. This study analyzed the stress generated on the metal layer surface in the CMP process using ANSYS software, a commercial structure analysis program. The stress caused by the vertical load applied from the pad was analyzed by changing the area density and line width of the dummy metal. As a result of the analysis, the stress in the active region decreased as the pattern density and line width of the dummy metal increased, and it was verified that it was valid compared with the previous study that studied the dishing according to the dummy pattern density and line width of the metal layer. In conclusion, it was confirmed that there is a relationship between dishing and normal stress.

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고정입자 패드를 이용한 층간 절연막 CMP에 관한 연구 (The Study of ILD CMP Using Abrasive Embedded Pad)

  • 박재홍;김호윤;정해도
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2001년도 춘계학술대회 논문집
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    • pp.1117-1120
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    • 2001
  • Chemical mechanical planarization(CMP) has emerged as the planarization technique of choice in both front-end and back-end integrated circuit manufacturing. Conventional CMP process utilize a polyurethane polishing pad and liquid chemical slurry containing abrasive particles. There have been serious problems in CMP in terms of repeatability and defects in patterned wafers. Since IBM's official announcement on Copper Dual Damascene(Cu2D) technology, the semiconductor world has been engaged in a Cu2D race. Today, even after~3years of extensive R&D work, the End-of-Line(EOL) yields are still too low to allow the transition of technology to manufacturing. One of the reasons behind this is the myriad of defects associated with Cu technology. Especially, dishing and erosion defects increase the resistance because they decrease the interconnection section area, and ultimately reduce the lifetime of the semiconductor. Methods to reduce dishing & erosion have recently been interface hardness of the pad, optimization of the pattern structure as dummy patterns. Dishing & erosion are initially generated an uneven pressure distribution in the materials. These defects are accelerated by free abrasive and chemical etching. Therefore, it is known that dishing & erosion can be reduced by minimizing the abrasive concentration. Minimizing the abrasive concentration by using Ce$O_2$ is the best solution for reducing dishing & erosion and for removal rate. This paper introduce dishing & erosion generating mechanism and a method for developing a semi-rigid abrasive pad to minimize dishing & erosion during CMP.

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고정입자 패드를 이용한 텅스텐 CMP에 관한 연구 (The Study of Metal CMP Using Abrasive Embedded Pad)

  • 박재홍;김호윤;정해도
    • 한국정밀공학회지
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    • 제18권12호
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    • pp.192-199
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    • 2001
  • Chemical mechanical planarization (CMP) has emerged as the planarization technique of choice in both front-end and back-end integrated circuit manufacturing. Conventional CMP process utilize a polyurethane polishing pad and liquid chemical slurry containing abrasive particles. There hale been serious problems in CMP in terms of repeatability and deflects in patterned wafers. Especial1y, dishing and erosion defects increase the resistance because they decrease the interconnection section area, and ultimately reduce the lifetime of the semiconductor. Methods to reduce dishing & erosion have recently been interface hardness of the pad, optimization of the pattern structure as dummy patterns. Dishing & erosion are initially generated an uneven pressure distribution in the materials. These defects are accelerated by free abrasives and chemical etching. Therefore, it is known that dishing & erosion can be reduced by minimizing the abrasive concentration. Minimizing the abrasive concentration by using CeO$_2$is the best solution for reducing dishing & erosion and for removal rate. This paper introduce dishing & erosion generating mechanism and a method fur developing a semi-rigid abrasive pad to minimize dishing & erosion during CMP.

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웨이퍼 레벨 Cu 본딩을 위한 Cu/SiO2 CMP 공정 연구 (Cu/SiO2 CMP Process for Wafer Level Cu Bonding)

  • 이민재;김사라은경;김성동
    • 마이크로전자및패키징학회지
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    • 제20권2호
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    • pp.47-51
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    • 2013
  • 본 연구에서는 웨이퍼 레벨 Cu 본딩을 이용한 3D 적층 IC의 개발을 위해 2단계 기계적 화학적 연마법(CMP)을 제안하고 그 결과를 고찰하였다. 다마신(damascene) 공정을 이용한 $Cu/SiO_2$ 복합 계면에서의 Cu dishing을 최소화하기 위해 Cu CMP 후 $SiO_2$ CMP를 추가로 시행하였으며, 이를 통해 Cu dishing을 $100{\sim}200{\AA}$까지 낮출 수 있었다. Cu 범프의 표면거칠기도 동시에 개선되었음을 AFM 관찰을 통해 확인하였다. 2단 CMP를 적용하여 진행한 웨이퍼 레벨 Cu 본딩에서는 dishing이나 접합 계면이 관찰되지 않아 2단 CMP 공정이 성공적으로 적용되었음을 확인할 수 있었다.

Dishing and Erosion Evaluations of Tungsten CMP Slurry in the Orbital Polishing System

  • Lee, Sang-Ho;Kang, Young-Jae;Park, Jin-Goo;Kwon, Pan-Ki;Kim, Chang-Il;Oh, Chan-Kwon;Kim, Soo-Myoung;Jhon, Myung-S.;Hur, Se-An;Kim, Young-Jung;Kim, Bong-Ho
    • Transactions on Electrical and Electronic Materials
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    • 제7권4호
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    • pp.163-166
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    • 2006
  • The dishing and the erosion were evaluated on the tungsten CMP process with conventional and new developed slurry. The tungsten thin film was polished by orbital polishing equipment. Commercial pattern wafer was used for the evaluation. Both slurries were pre tested on the oxide region on the wafer surface and the removal rate was not different very much. At the pattern density examination, the erosion performance was increased at all processing condition due to the reduction of thickness loss in new slurry. However, the dishing thickness was not remarkably changed at high pattern density despite of the improvement at low pattern density. At the large pad area, the reduction of dishing thickness was clearly found at new tungsten slurry.