• 제목/요약/키워드: digital signal processor(DSP)

검색결과 507건 처리시간 0.028초

DSP를 이용한 정면 밀링공구의 실시간 파단 감시방법에 관한 연구 (A Study on Real Time Monitoring of Tool Breakage in Milling Operation Using a DSP)

  • 백대균;고태조;김희술
    • 한국정밀공학회지
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    • 제13권6호
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    • pp.168-176
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    • 1996
  • A diagnosis system which can monitor tool breakage and chipping in real time was developed using a DSP(Digital Signal Processor) board in face milling operation. AR modelling and band energy method were used to extract the feature of tool states from cutting force signals. Artificial neural network embedded on DSP board discriminates different patterns from features got after signal processing. The features extracted from AR modelling are more accurate for the malfunction of a process than those from band energy method, even though the computing speed of the former is slow. From the processed features, we can construct the real time diagnosis system which monitors malfunction by using a DSP board having a parallel processing capability.

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DSP(TMS320F240)를 이용한 BLDC서보 전동기 다축 이송시스템 제어기 설계 (Design of DSP(TMS320F240) Controller for Multi-axes Transportation System with BLDC Servo Motor)

  • 김민섭;구효원;최중경;권현아;신영호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
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    • pp.95-98
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    • 2002
  • This paper presents a study on DSP(TMS320F240) controller design for multi-axes transportation system using BLDC servo motor. This BLDC servo motor controller was realized with DSP(Digital Signal Processor) and IPM (Intelligent Power Module). The multi-axes transportation system needs torque, speed, position control of servo motor for variable action. This paper implements those servo control with vector control and space vector modulation technique. As CPU of controller DSP(TMS320F240) is adopted because, it has PWM(Pulse Width Modulation) waveform generator, A/D(Analog to Digital) converter, SPI(Serial Peripheral Interface) port and input/output port etc. The controller of multi-axes transportation system consists of 3-level hierarchy structure that main host PC manages three sub DSP system which transfer downword command and are monitoring the states of end servo controllers. Each sub DSP system operates eight BLDC servo controllers which control BLDC servo motor using DSP and IPM Between host system and middle digital signal processor communicate with RS-422, between main processor and controller communicate with SPI port.

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DSP 및 PLECS를 활용한 PMSM 구동시스템용 고속 제어 시제품개발 기법 개발 (Development of rapid control prototyping for a PMSM drive system using DSPs and PLECS)

  • 이주영;최성민;김세환;이재석
    • 전기전자학회논문지
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    • 제26권2호
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    • pp.280-286
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    • 2022
  • 본 논문에서는 Digital Signal Processor(DSP)와 PLECS 소프트웨어를 사용하여 영구자석동기전동기(Permanent Magnet Synchronous Machine, PMSM)를 위한 Rapid Control Prototyping (RCP)를 구현하였다. PLECS의 Auto-code generation(ACG) 기능을 활용하여 제어 프로세서를 DSP로 사용하는 PMSM 구동 시스템에 대한 현재 벡터 제어 알고리즘을 보다 상대적으로 간단하고 효율적으로 개발할 수 있다. 본 논문에서는 모델 기반 설계(Model Based Design, MBD)와 real time control(실시간 제어) 배경을 살펴본다. 또한, DSP 보드와 호환되는 상용 RCP 제품 및 실험을 통한 PMSM 드라이브 제어를 구현하였다.

범용 DSP를 이용한 LPC 방식 실시간 음성 합성기 설계에 관한 연구 (A Study on the Design of the real-time speech synthesizer with the LPC method using Digital Signal Processor.)

  • 김홍선
    • 한국음향학회:학술대회논문집
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    • 한국음향학회 1984년도 추계학술발표회 논문집
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    • pp.63-65
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    • 1984
  • In this paper, the implementation of the real time LPC synthesizer using NEC 77p20, the DSP (Digital Signal Processor) chip which facilitates and simplifies the digital hardware, is considered. This method shows the good quality with the low bit rate below 9.6kbps and has the advantage of the flexibility and the simplicity.

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초점면 배열 방식의 열상카메라 시스템의 구현 (Implementation of a Thermal Imaging System with Focal Plane Array Typed Sensor)

  • 박세화;원동혁;오세중;윤대섭
    • 제어로봇시스템학회논문지
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    • 제6권5호
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    • pp.396-403
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    • 2000
  • A thermal imaging system is implemented for the measurement and the analysis of the thermal distribution of the target objects. The main part of the system is a thermal camera in which a focal plane array typed sensor is introduced. The sensor detects the mid-range infrared spectrum of target objects and then it outputs a generic video signal which should be processed to form a frame thermal image. Here, a digital signal processor(DSP) is applied for the high speed processing of the sensor signals. The DSP controls analog-to-digital converter, performs correction algorithms and outputs the frame thermal data to frame buffers. With the frame buffers can be generated a NTSC signal and transferred the frame data to personal computer(PC) for the analysis and a monitoring of the thermal scenes. By performing the signal processing functions in the DSP the overall system achieves a simple configuration. Several experimental results indicate the performance of the overall system.

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DSP를 이용한 확장 가능한 디지털 펄스압축기 설계 (The Design of Expansible Digital Pulse Compressor Using Digital Signal Processors)

  • 신현익;류영진;김환우
    • 전자공학회논문지SC
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    • 제40권3호
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    • pp.93-98
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    • 2003
  • 디지털 신호처리기에 대한 성능향상과 더불어 레이더 펄스 압축기 또한 디지털 처리방식이 점점 일반화 되어가고 있다. 디지털 펄스압축기는 FIR(finite impulse response) 필터 알고리즘을 이용한 시간영역 처리방식 또는 FFT(fast Fourier transform) 알고리즘을 이용한 주파수영역 처리방식으로 구현될 수 있다. 본 논문에서는 다중 DSP(digital signal processor)론 이용하여 확장성이 용이한 디지털 펄스압축기를 구성하고, 아날로그 디바이스사의 ADSP-21060을 적용하여 수신 거리 셀 및 FIR 필터 탭(tap) 수에 따른 펄스압축 연산시간을 E-언어와 어셈블리 언어로 시간영역에서 비교·분석하였다. 분석결과를 적용함으로써, 레이더의 시스템 파라미터가 정해지는 경우 펄스압축기 구성에 소요되는 DSP 수를 쉽게 예측할 수 있음을 확인하였다.

DVB-T2 수신기를 위한 BICM 모듈의 DSP 구현 (A DSP Implementation of the BICM Module for DVB-T2 Receivers)

  • 이재호
    • 한국항행학회논문지
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    • 제15권4호
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    • pp.591-595
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    • 2011
  • 본 논문에서는 차세대 유럽형 방송 시스템인 DVB-T2(Digital Video Broadcasting-Second Generation Terrestrial) 수신기의 핵심블록인 BICM(Bit Interleaved Coded Modulation) 모듈의 구조를 설계하고 DSP(Digital Signal Processor) TMS320C6474를 통해 구현하였다. 실험결과를 통해 8비트 이상을 사용하는 고정소수점 BICM 모듈이 부동소수점 BICM 모듈과 거의 동일한 BER(Bit Error Rate) 성능을 나타냄을 알 수 있었다.

내장형 시스템에 적합한 32 비트 RISC/DSP 마이크로프로세서에 관한 연구 (A Study on the 32 bit RISC/DSP Microprocessor Appropriate for Embedded Systems)

  • 유동열;문병인;홍종욱;이태영;이용석
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.257-260
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    • 1999
  • We have designed a 32-bit RISC microprocessor with 16/32-bit fixed-point DSP functionality. This processor, called YRD-5, combines both general-purpose microprocessor and digital signal processor (DSP) functionality using the reduced instruction set computer (RISC) design principles. It has functional units for arithmetic operation, digital signal processing (DSP) and memory access. They operate in parallel in order to remove stall cycles after DSP and load/store instructions with one or more issue latency cycles. High performance was achieved with these parallel functional units while adopting a sophisticated 5-stage pipeline structure and an improved DSP unit.

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DSP-Based Digital Controller for Multi-Phase Synchronous Buck Converters

  • Kim, Jung-Hoon;Lim, Jeong-Gyu;Chung, Se-Kyo;Song, Yu-Jin
    • Journal of Power Electronics
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    • 제9권3호
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    • pp.410-417
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    • 2009
  • This paper represents a design and implementation of a digital controller for a multi-phase synchronous buck converter (SBC) using a digital signal processor (DSP). The multi-phase SBC has generally been used for a voltage regulation module (VRM) of a microprocessor because of its high current handling capability at a low output voltage. The VRM requires high control performance of tight output regulation, high slew rate, and load sharing capability of multiple converters. In order to achieve these requirements, the design and implementation of a digital control system for a multi-phase SBC are presented in this paper. The digital PWM generation, current sensing, and voltage and current controller using a DSP TMS320F2812 are considered. The experimental results are provided to show the validity of the implemented digital control system.

범용 DSP를 이용한 RRS 기반 기지국 통신 플랫폼 구현 (Implementation of RRS-based Base station Communication platform using General-Purpose DSP)

  • 김호일;안흥섭;최승원
    • 디지털산업정보학회논문지
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    • 제14권4호
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    • pp.87-92
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    • 2018
  • One of the problems with the base station equipment is that there is a large difference between the replacement time of the hardware equipment such as the base station equipment and the radio access equipment, and the evolution period of the communication standard. Therefore, the base station communication platform must be flexible enough to handle the evolving communication standards after purchase. Recent research on reconfigurable communications platforms has focused on the efficient architecture of the communications platform to meet these requirements through software downloads while still using existing hardware. This paper presents a prototype of a base station communications platform based on the ETSI standard reconfigurable architecture. The communication platform presented in this paper is implemented as an ETSI standard reconfigurable architecture using a general-purpose DSP (Digital Signal Processor). In the implemented prototype, we verify the real-time feasibility of communication protocol updates through software reconfiguration.