• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2012.11a
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• pp.163-166
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• 2012

본 논문에서는 차세대 비디오 표준인 High Efficiency Video Coding(HEVC)의 영상 부호화 과정의 시간복잡도 감소를 위한 효율적인 Prediction Unit(PU)레벨 움직임예측(Motion Estimation, ME) 병렬화의 구현 기법을 제시하고자 한다. 움직임예측 과정은 부호화기에서 80%의 복잡도를 차지하는 과정으로 고속 부호화의 걸림돌이 되고 있다. 이를 해결하기 위한 방법으로 제안된 것이 움직임예측 알고리즘의 병렬화이다. 알고리즘 수준에서 ME 의 일부인 Merge Estimation 의 병렬화를 위해서 Merge Estimation Region (MER)기반의 ME 방법이 제안되었다. 하지만 HEVC Test Model reference software(HM)에 반영된 MER 을 이용하여 실제로 병렬화된 ME 를 구현하는 과정에서는 알고리즘 측면에서 아직 고려되지 않은 문제들이 존재한다. 이에 본 논문에서는 MER 을 사용한 안정적인 병렬 ME 를 구현하기 위한 전략으로 각 PU 의 정보를 독립적으로 사용하기 위한 부분 순차화 방법과 메모리 접근제한을 이용한 병렬화 방법을 제시한다. 실험을 통해 본 연구의 우수성이 확인되었는데, 제안된 방법에 기반을 둔 구현에서 순차적인 ME 를 이용한 부호화기 대비 평균 25.64%의 전체 부호화 과정 시간의 감소가 나타났다.

• Journal of Korea Society of Digital Industry and Information Management
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• v.15 no.4
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• pp.85-92
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• 2019

This paper presents a SDR-based Long Term Evolution Advanced (LTE-A) Physical Downlink Shared Channel (PDSCH) decoder using a multicore Digital Signal Processor (DSP). For decoder implementation, multicore DSP TMS320C6670 is used, which provides various hardware accelerators such as turbo decoder, fast Fourier transformer and Bit Rate Coprocessors. The TMS320C6670 is a DSP specialized in implementing base station platforms and is not an optimized platform for implementing mobile terminal platform. Accordingly, in this paper, the hardware accelerator was changed to the terminal implementation to implement the LTE-A PDSCH decoder supporting the multi-antenna and the functions not provided by the hardware accelerator were implemented through core programming. Also pipeline using multicore was implemented to meet the transmission time interval. To confirm the feasibility of the proposed implementation, we verified the real-time decoding capability of the PDSCH decoder implemented using the LTE-A Reference Measurement Channel (RMC) waveform about transmission mode 2 and 3.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.649-656
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• 2002

This paper addresses the phase noise analysis of high-speed DH-PLL(Digital Hybrid Phase-Locked Loops) frequency synthesizer. Because of the additional quantization noise of D/A converter in DH-PLL, the phase noise of DH-PLL is increased than the conventional PLL. Three kinds of noise sources such as reference input, D/A converter, and VCO(Voltage Controlled Oscillator) are considered to analyze the phase noise. It largely depends on the closed loop bandwidth and frequency synthesis division ratio(N) so that we can decide the optimal closed loop bandwidth to minimize the phase noise of DH-PLL. It is shown that the simulation results closely match with the results of analytical approach.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.5
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• pp.457-462
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• 2017

This paper proposes a digital power control of the LLC resonant half-bridge inverter for high power microwave oven application. Conventional half-bridge inverter for driving a microwave oven uses a hardware-based power control method which varies the frequency according to the AC source voltage. In this case, it is difficult to control the output power according to the variation of the load status of magnetron. The proposed power control consists of an instantaneous current generator and a current controller. Instantaneous current generator makes an instantaneous current reference from power command using input voltage information. Current controller controls input current which has an information of status of magnetron. The proposed power control does not require any compensation algorithm for the change of the load status of the magnetron and change of input voltage. The validity of the proposed method for the control of the change of input voltage and frequency is verified by both simulation and experiment.

• ETRI Journal
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• v.35 no.4
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• pp.638-643
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• 2013

This paper presents a 5-bit digital step attenuator (DSA) using a commercial 0.18-${\mu}m$ silicon-on-insulator (SOI) process for the wideband phased array antenna. Both low insertion loss and low root mean square (RMS) phase error and amplitude error are achieved employing two attenuation topologies of the switched path attenuator and the switched T-type attenuator. The attenuation coverage of 31 dB with a least significant bit of 1 dB is achieved at DC to 20 GHz. The RMS phase error and amplitude error are less than $2.5^{\circ}$ and less than 0.5 dB, respectively. The measured insertion loss of the reference state is less than 5.5 dB at 10 GHz. The input return loss and output return loss are each less than 12 dB at DC to 20 GHz. The current consumption is nearly zero with a voltage supply of 1.8 V. The chip size is $0.93mm{\times}0.68mm$, including pads. To the best of the authors' knowledge, this is the first demonstration of a low phase error DC-to-20-GHz SOI DSA.

• Journal of the Korea Society of Computer and Information
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• v.8 no.3
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• pp.94-99
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• 2003

In this paper, a rotation invariant fingerprint identification system is implemented using the circular harmonic filter and phase only correlator. We extracted the phase component from input fingerprint image and correlate it with the circular harmonic filter of the reference fingerprint image by POC. The input image is obtained using a prism operating in the internal full reflection mode. Then the input image is transformed to two dimensional Fourier spectrum in optical way and the phase component is extracted using a digital system from the spectrum. Because composed of the optical system and digital algorithm, the proposed system has the advantages of the two technologies such as realtime parallel processing property of the optics and the flexibility of the digital system.

• Journal of Korea Society of Digital Industry and Information Management
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• v.14 no.4
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• pp.79-85
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• 2018

This paper presents an implementation method of Long Term Evolution-Advanced (LTE-A) Physical Downlink Shared Channel (PDSCH) decoder using a general-purpose multicore Digital Signal Processor (DSP), TMS320C6670. Although the DSP provides some useful coprocessors such as turbo decoder, fast Fourier transformer, Viterbi Coprocessor, Bit Rate Coprocessor etc., it is specific to the base station platform implementation not the mobile terminal platform implementation. This paper shows an implementation method of the LTE-A PDSCH decoder using programmable DSP cores as well as the coprocessors of Fast Fourier Transformer and turbo decoder. First, it uses the coprocessor supported by the TMS320C6670, which can be used for PDSCH implementation. Second, we propose a core programming method using DSP optimization method for block diagram of PDSCH that can not use coprocessor. Through the implementation, we have verified a real-time decoding feasibility for the LTE-A downlink physical channel using test vectors which have been generated from LTE-A Reference Measurement Channel (RMC) Waveform R.6.

• Journal of Digital Convergence
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• v.19 no.8
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• pp.337-343
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• 2021

This study researched the user experience of the monthly magazine subscription service, focusing on design students and designers. The revenue of magazine industry has been declined since 2012 and some magazines stop publishing or cease to publish. That is why this studied the user experience of magazine subscription services of monthly to increase magazine sales revenue, the largest portion of whole revenue. A survey and in-depth interviews with subscribers and non-subscribers was conducted to suggest improvements for the monthly . Since this study focused on user experience of magazine subscription, it could be a future reference for studying magazine subscription service.

• Genomics & Informatics
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• v.19 no.3
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• pp.34.1-34.6
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• 2021

Digital PCR (dPCR) is the third-generation PCR that enables real-time absolute quantification without reference materials. Recently, global diagnosis companies have developed new dPCR equipment. In line with the development, the Lab On An Array (LOAA) dPCR analyzer (Optolane) was launched last year. The LOAA dPCR is a semiconductor chip-based separation PCR type equipment. The LOAA dPCR includes Micro Electro Mechanical System that can be injected by partitioning the target gene into 56 to 20,000 wells. The amount of target gene per wells is digitized to 0 or 1 as the number of well gradually increases to 20,000 wells because its principle follows Poisson distribution, which allows the LOAA dPCR to perform precise absolute quantification. LOAA determined region of interest first prior to dPCR operation. To exclude invalid wells for the quantification, the LOAA dPCR has applied various filtering methods using brightness, slope, baseline, and noise filters. As the coronavirus disease 2019 has now spread around the world, needs for diagnostic equipment of point of care testing (POCT) are increasing. The LOAA dPCR is expected to be suitable for POCT diagnosis due to its compact size and high accuracy. Here, we describe the quantitative principle of the LOAA dPCR and suggest that it can be applied to various fields.

• Journal of Fashion Business
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• v.27 no.4
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• pp.67-87
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• 2023

This study analyzed the fashion design features of Iris van Herpen and createdsixdigital fashion designsusing the SCAMPER technique with 3D clothing design software, incorporating a futuristic theme. The research methodology involvedcase analysis and a literature survey. First, the study summarizedthe design style and characteristics of Iris van Herpen. Second, a design concept wasestablished, and a design mood board wascreated. Third, the resulting design features were combined with the SCAMPER technique to incorporate Iris van Herpen's design elements intonew digital fashion designs. Fourth, after discussion with the professor and expert group, six designs were selected for production. They includededgy suit coats, overcoats, asymmetrical hoodies and asymmetrical skirts, irregularly shaped tops, dresses, leggings, jackets,and fishtail skirts. This study provides a reference for the future development of digital fashion designs and showcases the integration of science and technology in fashion design.