• Title/Summary/Keyword: digital CDS

Search Result 22, Processing Time 0.022 seconds

A Low Power Dual CDS for a Column-Parallel CMOS Image Sensor

  • Cho, Kyuik;Kim, Daeyun;Song, Minkyu
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.12 no.4
    • /
    • pp.388-396
    • /
    • 2012
  • In this paper, a $320{\times}240$ pixel, 80 frame/s CMOS image sensor with a low power dual correlated double sampling (CDS) scheme is presented. A novel 8-bit hold-and-go counter in each column is proposed to obtain 10-bit resolution. Furthermore, dual CDS and a configurable counter scheme are also discussed to realize efficient power reduction. With these techniques, the digital counter consumes at least 43% and at most 61% less power compared with the column-counters type, and the frame rate is approximately 40% faster than the double memory type due to a partial pipeline structure without additional memories. The prototype sensor was fabricated in a Samsung $0.13{\mu}m$ 1P4M CMOS process and used a 4T APS with a pixel pitch of $2.25{\mu}m$. The measured column fixed pattern noise (FPN) is 0.10 LSB.

Design of a Comparator with Improved Noise and Delay for a CMOS Single-Slope ADC with Dual CDS Scheme (Dual CDS를 수행하는 CMOS 단일 슬로프 ADC를 위한 개선된 잡음 및 지연시간을 가지는 비교기 설계)

  • Heon-Bin Jang;Jimin Cheon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.16 no.6
    • /
    • pp.465-471
    • /
    • 2023
  • This paper proposes a comparator structure that improves the noise and output delay of a single-slope ADC(SS-ADC) used in CMOS Image Sensor (CIS). To improve the noise and delay characteristics of the output, a comparator structure using the miller effect is designed by inserting a capacitor between the output node of the first stage and the output node of the second stage of the comparator. The proposed comparator structure improves the noise, delay of the output, and layout area by using a small capacitor. The CDS counter used in the single slop ADC is designed using a T-filp flop and bitwise inversion circuit, which improves power consumption and speed. The single-slope ADC also performs dual CDS, which combines analog correlated double sampling (CDS) and digital CDS. By performing dual CDS, image quality is improved by reducing fixed pattern noise (FPN), reset noise, and ADC error. The single-slope ADC with the proposed comparator structure is designed in a 0.18-㎛ CMOS process.

Modeling and simulation of foxboro control system for YGN#3,4 power plant (영광 3,4호기 Foxboro 제어시스템 모델링 및 시뮬레이션)

  • 김동욱;이용관;유한성
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1997.10a
    • /
    • pp.179-182
    • /
    • 1997
  • In a training simulator for power plant, operator's action in the MCR(Main Control Room) are given to plant process and computer system model as an inputs, and the same response as in real power plant is provided in real time. Inter-process communication and synchronization are especially important among various inputs. In the plant simulator, to simulate the digital control system such as FOXBORO SPEC-200 Micro control system, modification and adaptation of control card(CCC) and its continuous display station(CDS) is necessary. This paper describes the modeling and simulation of FOXBORO SPEC-200 Micro control system applied to Younggwang nuclear power plant unit #3 & 4, and its integration process to the full-scope replica type training simulator. In a simulator, display station like CDS of FOXBORO SPEC-200 Micro control system is classified as ITI(Intelligent Type Instrument), which has a micro processor inside to process information and the corresponding alphanumeric display, and the stimulation of ITI limits the important functions in a training simulator such as backtrack, replay, freeze and IC reset. Therefore, to achieve the better performance of the simulator, modification of CDS and special firmware is developed to simulate the FOXBORO SPEC-200 Micro control system. Each control function inside control card is modeled and simulated in generic approach to accept the plant data and control parameter conveniently, and debugging algorithms are applied for massive coding developed in short period.

  • PDF

Design and Evaluation of a CMOS Image Sensor with Dual-CDS and Column-parallel SS-ADCs

  • Um, Bu-Yong;Kim, Jong-Ryul;Kim, Sang-Hoon;Lee, Jae-Hoon;Cheon, Jimin;Choi, Jaehyuk;Chun, Jung-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.17 no.1
    • /
    • pp.110-119
    • /
    • 2017
  • This paper describes a CMOS image sensor (CIS) with dual correlated double sampling (CDS) and column-parallel analog-to-digital converter (ADC) and its measurement method using a field-programmable gate array (FPGA) integrated module. The CIS is composed of a $320{\times}240$ pixel array with $3.2{\mu}m{\times}3.2{\mu}m$ pixels and column-parallel 10-bit single-slope ADCs. It is fabricated in a $0.11-{\mu}m$ CIS process, and consumes 49.2 mW from 1.5 V and 3.3 V power supplies while operating at 6.25 MHz. The measured dynamic range is 53.72 dB, and the total and column fixed pattern noise in a dark condition are 0.10% and 0.029%. The maximum integral nonlinearity and the differential nonlinearity of the ADC are +1.15 / -1.74 LSB and +0.63 / -0.56 LSB, respectively.

Analysis of the trueness and precision of complete denture bases manufactured using digital and analog technologies

  • Leonardo Ciocca;Mattia Maltauro;Valerio Cimini;Lorenzo Breschi;Angela Montanari;Laura Anderlucci;Roberto Meneghello
    • The Journal of Advanced Prosthodontics
    • /
    • v.15 no.1
    • /
    • pp.22-32
    • /
    • 2023
  • PURPOSE. Digital technology has enabled improvements in the fitting accuracy of denture bases via milling techniques. The aim of this study was to evaluate the trueness and precision of digital and analog techniques for manufacturing complete dentures (CDs). MATERIALS AND METHODS. Sixty identical CDs were manufactured using different production protocols. Digital and analog technologies were compared using the reference geometric approach, and the Δ-error values of eight areas of interest (AOI) were calculated. For each AOI, a precise number of measurement points was selected according to sensitivity analyses to compare the Δ-error of trueness and precision between the original model and manufactured prosthesis. Three types of statistical analysis were performed: to calculate the intergroup cumulative difference among the three protocols, the intergroup among the AOIs, and the intragroup difference among AOIs. RESULTS. There was a statistically significant difference between the dentures made using the oversize process and injection molding process (P < .001), but no significant difference between the other two manufacturing methods (P = .1227). There was also a statistically significant difference between the dentures made using the monolithic process and the other two processes for all AOIs (P = .0061), but there was no significant difference between the other two processes (P = 1). Within each group, significant differences among the AOIs were observed. CONCLUSION. The monolithic process yielded better results, in terms of accuracy (trueness and precision), than the other groups, although all three processes led to dentures with Δ-error values well within the clinical tolerance limit.

Design of a CMOS Image Sensor Based on a 10-bit Two-Step Single-Slope ADC (10-bit Two-Step Single Slope A/D 변환기를 이용한 고속 CMOS Image Sensor의 설계)

  • Hwang, Inkyung;Kim, Daeyun;Song, Minkyu
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.50 no.11
    • /
    • pp.64-69
    • /
    • 2013
  • In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two-step single-slope A/D converter is proposed. The A/D converter is composed of both a 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D converter. In order to have a small noise characteristics, further, a Digital Correlated Double Sampling(D-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35mW at 3.3V supply voltage. The measured conversion speed is 10us, and the frame rate is 220 frames/s.

Reconnecting the Dots for the Payment Service Directive 2 - Compatible Asian Financial Network

  • Choi, Gongpil;Park, Meeyoung
    • East Asian Economic Review
    • /
    • v.23 no.3
    • /
    • pp.285-309
    • /
    • 2019
  • Unlike the popular belief, digital transformation mainly gets stymied by legal and regulatory issues related with legacy institutions in Asia rather than technical difficulties. The real challenges triggered by the PSD2 (Payment Services Directive 2) are how the region would overcome the overly fragmented, centralized, and hierarchical legacy framework to allow necessary changes to respond to the digital single market initiatives as promulgated by the European counterpart. The PSD2 is expected to bring about substantial changes in the payment ecosystem by allowing payment service providers to access customers' accounts and transactions information via API that have been traditionally controlled by banks. This paper suggests an incentive-compatible mechanism design for open collaboration among legacy institutions in the region to help them adapt to the PSD2. As evidenced by case studies in Korea, the Asian equivalent of PSD2 can be implemented and further expanded to create region-wide PCS (payment-clearing-settlement) network by reconnecting the dots of legacy infrastructures. These decentralized, diverse, small payment networks can be further combined with the expanded RTGS-CDS platform to evolve into the next phase of Asian Financial Network.

A Digital Readout IC with Digital Offset Canceller for Capacitive Sensors

  • Lim, Dong-Hyuk;Lee, Sang-Yoon;Choi, Woo-Seok;Park, Jun-Eun;Jeong, Deog-Kyoon
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.12 no.3
    • /
    • pp.278-285
    • /
    • 2012
  • A digital readout IC for capacitive sensors is presented. Digital capacitance readout circuits suffer from static capacitance of sensors, especially single-ended sensors, and require large passive elements to cancel such DC offset signal. For this reason, to maximize a dynamic range with a small die area, the proposed circuit features digital filters having a coarse and fine compensation steps. Moreover, by employing switched-capacitor circuit for the front-end, correlated double sampling (CDS) technique can be adopted to minimize low-frequency device noise. The proposed circuit targeted 8-kHz signal bandwidth and oversampling ratio (OSR) of 64, thus a $3^{rd}$-order ${\Delta}{\Sigma}$ modulator operating at 1 MH was used for pulse-density-modulated (PDM) output. The proposed IC was designed in a 0.18-${\mu}m$ CMOS mixed-mode process, and occupied $0.86{\times}1.33mm^2$. The measurement results shows suppressed DC power under about -30 dBFS with minimized device flicker noise.

Website and Digital Content between Material Property and Intellectual Ownership Rights within the Legal Regulation of Internet

  • Azab, Rania S.
    • International Journal of Computer Science & Network Security
    • /
    • v.22 no.2
    • /
    • pp.424-435
    • /
    • 2022
  • When the owners of the intellectual property rights of digital content have lost control over it in the digital environment, there emerged fears that the intellectual property laws, especially copyright law, would not be effective as in the material (Offline ) world. The reason is that the digital environment helps to reproduce copies in high quality and at almost no cost, while copyright law protection has been limited to programs embedded in CDs. According to copyright laws, the owner of the program did not have the right to prevent buyers of the initial physical copy of the program from copying and reselling it to more than one individual without the permission of the original owner. As a result, business owners have invented the idea of licensing digital content and programs instead of selling them. They set out terms that serve their commercial interests regardless of their abuse to intellectual property laws or even the rules of the traditional contract to sell a material property. The abuse has resulted from the way those terms are concluded and the heavy rules that are unfair to consumer rights. Therefore, business owners insisted on dealing with the website and its programs and digital content as material property. Here raises the question of whether the website and its digital content are subject to the protection of copyright law or the rules of the traditional contract or licensing contracts. As the answer to this question affects the protection of consumer rights, is it possible to find a balance between it and the protection of the owners of digital programs' rights.That is what we will discuss in this paper.

Preference and Use of Electronic Information and Resources by Blind/Visually Impaired in NCR Libraries in India

  • Kumar, Shailendra;Sanaman, Gareema
    • Journal of Information Science Theory and Practice
    • /
    • v.1 no.2
    • /
    • pp.69-83
    • /
    • 2013
  • This paper aims to determine the preference and use of electronic information and resources by blind/visually impaired users in the leading National Capital Region (NCR) libraries of India. Survey methodology has been used as the basic research tool for data collection with the help of questionnaires. The 125 in total users surveyed in all the five libraries were selected randomly on the basis of willingness of the users with experience of working in digital environments to participate in the survey. The survey results were tabulated and analyzed with descriptive statistics methods using Excel software and 'Stata version 11'. The findings reveal that ICT have a positive impact in the lives of people with disabilities as it helps them to work independently and increases the level of confidence among them. The Internet is the most preferred medium of access to information among the majority of blind/visually impaired users. The 'Complexity of content available on the net' is found as the major challenge faced during Internet use by blind users of NCR libraries. 'Audio books on CDs/DVDs and DAISY books' are the most preferred electronic resources among the majority of blind/visually impaired users. This study will help the library professionals and organizations/institutions serving people with disabilities to develop effective library services for blind/visually impaired users in the digital environment on the basis of findings on information usage behavior in the study.