• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.35-42
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• 2013

In this paper, the analog performance of FinFET structure was estimated by extracting the DC/AC characteristics of the 22 nm process FinFET structures with different layout considering spacer and SEG using 3D device simulator, Sentaurus. Based on the analysis results, layout methods to enhance the analog performance of multi-fin FinFET structures are proposed. By adding the spacer and SEG structures, the drive current of 1-fin FinFET increases. However, the unity gain frequency, $f_T$, reduces by 19.4 % due to the increase in the total capacitance caused by the added spacer. If the process element is not included in multi-fin FinFET, replacing 1-finger with 2-finger structure brings approximately 10 % of analog performance improvement. Considering the process factors, we propose methods to maximize the analog performance by optimizing the interconnect and gate structures.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.230-238
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• 2014

In this paper, we propose the possible way of accurate analysis and examination of ITO sensor to discriminate whether mutual capacitance ITO sensor is defective by using mutual capacitance of data in each node which consists of electrodes inside of ITO sensor. We have analyzed the structure characteristic of mutual capacitance ITO sensor which is used as an input device for not only small size electronics like mobile phone and tablets but also big size electronics and designed the circuit to inspect ITO sensor using touch screen panel IC. Set a variable related with mutual capacitance of charge and discharge and Implement to find and analyze accurate position when defect is made through the data from each node of ITO sensor. First, we can set a yield effective range through the first experiment data of mutual capacitance ITO sensor and by using the data of each node of ITO sensor which is the result from the second experiment, we can verify accuracy and effectiveness of effective range from the first experiment as a sample which is used in this experiment.

• Journal of the Semiconductor & Display Technology
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• v.6 no.4
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• pp.69-73
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• 2007

The MIM(metal-insulator-metal) capacitors with the Al/PMMA/ITO/Glass structures were manufactured according to various PMMA concentration of 1, 2, 4, 6, 8 wt%. The lowest leakage current and the largest capacitance were found to be 2.3 pA and 1.2 nF, respectively, for the device with 2 wt% PMMA concentration. The measured capacitance of the devices was almost same values with the calculated one. The optimum film thickness was obtained at the value of 48 nm, showing that the capacitance and leakage current were 1.92 nF, 0.3 pA at 2 wt%, respectively. From this experiment, the PMMA gate insulator films can be applicable to the organic thin film transistors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.1
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• pp.23-29
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• 2001

The effects of Ti-silicide process on the electrical properties of an analog polysilicon capacitor were investigated. To improve the linearity with the applied voltage both electrodes, which are polysilicon in our device, should have almost same material properties. The doping concentrations of both electrodes need to be high and to have the similar levels. Voltage Coefficient of Capacitance (VCC) is one of the properties to represent the linearity of analog capacitor, and it is related with the material and the structure of capacitor. In this study, it was possible to obtain the lower VCC by siliciding the polysilicon areas of capacitor. This is due to the parasitic capacitance at the interfaces between silicide and polysilicons, resulting the decrease of unit capacitance. However, we assumed the creation of positive oxide charge near the lower polysilicon electrode during the silicide process.

• ETRI Journal
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• v.19 no.4
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• pp.402-413
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• 1997

A CMOS device which has an extended heavily-doped amorphous silicon source/drain layer on the field oxide and an amorphous silicon local interconnection (ASLI) layer in the self-aligned source/drain region has been studied. The ASLI layer has some important roles of the local interconnections from the extended source/drain to the bulk source/drain and the path of the dopant diffusion sources to the bulk. The junction depth and the area of the source/drain can be controlled easily by the ASLI layer thickness. The device in this paper not only has very small area of source/drain junctions, but has very shallow junction depths than those of the conventional CMOS device. An operating speed, however, is enhanced significantly compared with the conventional ones, because the junction capacitance of the source/drain is reduced remarkably due to the very small area of source/drain junctions. For a 71-stage unloaded CMOS ring oscillator, 128 ps/gate has been obtained at power supply voltage of 3.3V. Utilizing this proposed structure, a buried channel PMOS device for the deep submicron regime, known to be difficult to implement, can be fabricated easily.

• Journal of Magnetics
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• v.16 no.3
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• pp.246-252
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• 2011

A high-voltage power supply has been built for activation of the brain via stimulation using a Full Wave Cockroft-Walton Circuit (FWCW). A resonant half-bridge inverter was applied (with half plus/half minus DC voltage) through a bidirectional power transistor to a magnetic stimulation device with the capability of producing a variety of pulse forms. The energy obtained from the previous stage runs the transformer and FW-CW, and the current pulse coming from the pulse-forming circuit is transmitted to a stimulation coil device. In addition, the residual energy in each circuit will again generate stimulation pulses through the transformer. In particular, the bidirectional device modifies the control mode of the stimulation coil to which the current that exceeds the rated current is applied, consequently controlling the output voltage as a constant current mode. Since a serial resonant half-bridge has less switching loss and is able to reduce parasitic capacitance, a device, which can simultaneously change the charging voltage of the energy-storage condenser and the pulse repetition rate, could be implemented. Image processing of the brain activity was implemented using a graphical user interface (GUI) through a data mining technique (data mining) after measuring the vital signs separated from the frequencies of EEG and ECG spectra obtained from the pulse stimulation using a 90S8535 chip (AMTEL Corporation).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.913-919
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• 2000

We give pressure stimulation into long chain fatty acid of LB thin films then manufacture a device under the accumulation condition that the state surface pressure is 20[mN/m]. In processing of a device manufacture, we can see the process is good from the change of a surface pressure for organic thin films and transfer ratio of area per molecule. The structure of manufactured device is Au/Arachidic acid/Al, the number of accumulated layers are 13, 17 and 19. The I-V characteristic of the device is measured from 0[V] to +1.5[V]. We have investigated the capacitance because this fatty acid system have a accumulated layers. The maximum value of measured current is increased as the number of accumulated layers are decreased. The capacitor properties of a thin film is better as the distance between electrodes is smaller. The results have shown the insulating materials and could control the conductivity by accumulated layers.

• Journal of Magnetics
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• v.12 no.1
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• pp.21-26
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• 2007

Si-based electromagnetic noise suppressors on coplanar waveguide transmission lines incorporated with a $SiO_2$ dielectric layer and a nanogranular Co-Fe-Al-O magnetic thin film are reported. Unlike glass-based devices, large signal attenuation is observed even in the bare structure without coating the magnetic thin film. Much larger signal attenuation is achieved in fully integrated devices. The transmission scattering parameter ($S_{21}$) is as small as -90 dB at 20 GHz at the following device dimensions; the thicknesses of the $SiO_2$ and Co-Fe-Al-O thin films are 0.1 $\mu$m and 1 $\mu$m, respectively, the length of the transmission line is 15 mm, and the width of the magnetic thin film is 2000 $\mu$m. In all cases, the reflection scattering parameter ($S_{11}$) is below -10 dB over the whole frequency band. Additional distributed capacitance formed by the Cu transmission line/$SiO_2$/Si substrate is responsible for these characteristics. It is considered that the present noise suppressors based on the Si substrate are a first important step to the realization of MMIC noise suppressors.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1085-1088
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• 2003

In this work, we fabricated a gas-sensing device based on porous silicon(PS), and its I-V and C-V properties were investigated for sensing alcohol vapor. The structure of the sensor consists of thin Au/Oxidized porous silicon/porous silicon/Silicon/Al, where the silicon substrate is etched anisotropically to be prepared into a membrane shape. As the result, I-V curves showed typical tunneling property, and C-V curves were shaped like those of a MIS (metal-insulator- semiconductor) capacitor, where the capacitance in accumulation was increased with alcohol vapor concentration.

• Journal of the Semiconductor & Display Technology
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• v.8 no.4
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• pp.21-24
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• 2009

We investigated a nanoscale inertia sensor based on telescoping carbon nanotubes, using classical molecular dynamics simulations. The position of the telescoping nanotubes is controlled by the centrifugal force exerted by the rotation platform, thus, position shifts are determined by the capacitance between carbon nanotubes and the electrode, and the operating frequency of the carbon nanotube oscillator. This measurement system, tracking oscillations of the carbon nanotube oscillator, can be used as the sensor for numerous types of devices, such as motion detectors, accelerometers and acoustic sensors.