• 제목/요약/키워드: design error

검색결과 5,330건 처리시간 0.031초

Low-Complexity Triple-Error-Correcting Parallel BCH Decoder

  • Yeon, Jaewoong;Yang, Seung-Jun;Kim, Cheolho;Lee, Hanho
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제13권5호
    • /
    • pp.465-472
    • /
    • 2013
  • This paper presents a low-complexity triple-error-correcting parallel Bose-Chaudhuri-Hocquenghem (BCH) decoder architecture and its efficient design techniques. A novel modified step-by-step (m-SBS) decoding algorithm, which significantly reduces computational complexity, is proposed for the parallel BCH decoder. In addition, a determinant calculator and a error locator are proposed to reduce hardware complexity. Specifically, a sharing syndrome factor calculator and a self-error detection scheme are proposed. The multi-channel multi-parallel BCH decoder using the proposed m-SBS algorithm and design techniques have considerably less hardware complexity and latency than those using a conventional algorithms. For a 16-channel 4-parallel (1020, 990) BCH decoder over GF($2^{12}$), the proposed design can lead to a reduction in complexity of at least 23 % compared to conventional architecttures.

측정오차가 공정평균 관리도의 경제적 설계에 미치는 영향 (Effect of Measurement Error on the Economic Design of Control Charts for Controlling Process Means)

  • 염창선
    • 산업경영시스템학회지
    • /
    • 제22권50호
    • /
    • pp.55-63
    • /
    • 1999
  • Past studies on economic control charts for controlling process means assumed that the measures of a quality characteristic do not have measurement error. In practice, however, this assumption is frequently violated. In this paper, the economic design models of three control charts(Xbar control chart, Xbar control chart with warning limits, and CUSUM control chart) for controlling process means are developed on the assumption that the measures can have measurement error. The effects of measurement error on the process control cost and design parameters of three economic control charts are examined. According to the experiments done in this study, when measurement error exists, the economic CUSUM control chart has lower process control cost in comparison with two other control charts. When measurement error becomes larger, both the sample size and the sampling interval increase while the control limits decrease.

  • PDF

단순 FLC의 정상상태오차 해석 (Analysis of Steady State Error on Simple FLC)

  • 이경웅;최한수
    • 제어로봇시스템학회논문지
    • /
    • 제17권9호
    • /
    • pp.897-901
    • /
    • 2011
  • This paper presents a TS (Takagi-Sugeno) type FLC (Fuzzy Logic Controller) with only 3 rules. The choice of parameters of FLC is very difficult job on design FLC controller. Therefore, the choice of appropriate linguistic variable is an important part of the design of fuzzy controller. However, since fuzzy controller is nonlinear, it is difficult to analyze mathematically the affection of the linguistic variable. So this choice is depend on the expert's experience and trial and error method. In the design of the system, we use a variety of response characteristics like stability, rising time, overshoot, settling time, steady-state error. In particular, it is important for a stable system design to predict the steady-state error because the system's steady-state response of the system is related to the overall quality. In this paper, we propose the method to choose the consequence linear equation's parameter of T-S type FLC in the view of steady-state error. The parameters of consequence linear equations of FLC are tuned according to the system error that is the input of FLC. The full equation of T-S type FLC is presented and using this equation, the relation between output and parameters can represented. As well as the FLC parameters of consequence linear equations affect the stability of the system, it also affects the steady-state error. In this study, The system according to the parameter of consequence linear equations of FLC predict the steady-state error and the method to remove the system's steady-state error is proposed using the prediction error value. The simulation is carried out to determine the usefulness of the proposed method.

로지스틱 회귀분석을 이용한 BIM 설계 검토에 의하여 발견된 설계 오류와 그 영향도간의 관계 분석 (An Analysis on Relations between Design Errors Detected during BIM-based Design Validation and the Impacts Using Logistic Regression)

  • 원종성
    • 한국건축시공학회:학술대회논문집
    • /
    • 한국건축시공학회 2017년도 춘계 학술논문 발표대회
    • /
    • pp.264-265
    • /
    • 2017
  • This paper aims to analyze relations between design errors prevented by building information modeling (BIM)-based design validation and their impacts in order to identify critical consideration factors for successfully implementing BIM-based design validation in the architecture, engineering, and construction (AEC) projects. More than 800 design errors detected by BIM-based design validation in two BIM-based projects in South Korea are categorized according to its causes and work types. The relations between causes and work types of design errors and project delay, cost overrun, low quality, and rework generation that can be caused by the errors are analyzed through conducting logistic regression. Characteristics of each design error are analyzed by conducting face-to-face interviews with practitioners in the two BIM-based projects. As the results, the impacts of design error causes on predicting project delay, cost overrun, low quality, and rework generation were the highest.

  • PDF

제한된 최소 자승 오차 기준에 의한 다양한 FIR 필터 구현 (Implementation of Various FIR Filters using Constrained Least Square Criterion)

  • 홍승억;김중규
    • 전자공학회논문지S
    • /
    • 제35S권10호
    • /
    • pp.175-185
    • /
    • 1998
  • 본 논문에서는 Adams에 의해 제안된 제한된 최소 자승 오차 기준에 의한 FIR 필터 설계 방법을 기초로 하여 저역 통과 필터 외의 다른 여러 가지 필터를 설계할 수 있는 방법론을 제시하였다. 이 방법에 의한 설계는 기존의 자승 오차 최소화 방법과 최대 오차 최소화 방법의 혼합된 형태로써 오차 기준으로 자승 오차와 최대 오차 두 가지를 동시에 고려하게 되며, 최고 이득, 전이 대역폭, 자승 오차 세가지가 모두 만족될 때만 그 해 즉, 임펄스 응답을 찾을 수 있게 된다. 이때 최적화 과정에서는 다중 교환 알고리즘을 이용하였다. 본 논문은 위의 두 중요 오차 기준의 상호 보완을 통하여 다중 대역 통과 필터, 미분기 및 Hilbert 변환기등의 최적 설계에 적용할 수 있는 방법에 대해 고찰하였으며, 그 결과 제한된 최소 자승 오차 기준에 의한 설계 방법이 단순한 저역 통과 필터 뿐만이 아니라 여러 가지 다양한 FIR 필터 설계에 있어서도 그 우수함을 증명할 수 있었다.

  • PDF

자극에 대한 상호작용 관점에서의 노인의 오류 특성 (The Elderly's Error Characteristics in Some Human Interactions)

  • 정광태
    • 대한인간공학회지
    • /
    • 제30권1호
    • /
    • pp.109-115
    • /
    • 2011
  • In this research, three topics were studied for the elderly. The first was the elderly's error characteristics for tracing task and the second was for depth perception. The characteristics were compared with the young's. Twenty two old people and twenty two young people participated in the tracing experiment, respectively. In the depth perception experiment, twenty three old people and twenty two young people participated. A depth perception apparatus and a tracing one were used in the experiment. In the depth perception error, a significant difference was not detected on gender. However significant differences were detected with age and viewing distance. In the tracing error, significant difference was detected with age, also. The third experiment was push-button operation and fifteen old people participated in the experiment. As the result, operation time error was increased with the button size and the moving distance. The result of this study will be able to be considered in its user interface design to reduce the elderly's error while using a product.

이단계 지분계획법의 오차제곱합 유도와 그 활용 (Derivation of error sum of squares of two stage nested designs and its application)

  • 김대학
    • Journal of the Korean Data and Information Science Society
    • /
    • 제24권6호
    • /
    • pp.1439-1448
    • /
    • 2013
  • 확률화 블록계획법이나 교차된 이원분류표에 대한 분산분석과 오차제곱합의 성질은 널리 알려져있다. 본 논문에서는 인자에 따른 수준에 또 다른 인자들이 내포되어 있는 지분계획 특히 이단계 지분계획에 대하여 구조적 특징을 설명하고 오차제곱합의 성질에 대하여 살펴보았다. 또한 이단계 지분계획의 활용으로 크로스오버 계획을 소개하고 생물학이나 약학 등의 분야에서 많이 사용되는 동등성 검정의 신뢰구간 구축에 대하여 설명하였고 실제자료와 SPSS 통계 페키지를 이용하여 분석함으로서 응용성을 부각시켰다.

IP 설계를 위한 설계규칙 검사기 구현 (Implementation of Design Rule Checker for IP Design)

  • 백영석;배영환;조한진
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
    • /
    • pp.172-175
    • /
    • 2000
  • In this paper, we address the requirement of VHDL parser for design rule checker, and the structure and implementing method of design rule checker which checks if IP design is valuable to reuse. This checker builds the grammar trees from the design rules, and the internal graphs representation from IP design data. It maps the nodes of the grammar trees and the internal graphs to check if it violates the design rules. The design rule checker can do the cross reference between source codes and error messages to find error position easy.

  • PDF

적응 보상기를 가지는 출력오차 방법을 이용한 IIR 다지탈 필터의 적응적 설계 (Adaptive Design of IIR Digital Filters Using Output Error Method with Adaptive Compensator)

  • 배현덕;이종각
    • 대한전기학회논문지
    • /
    • 제36권9호
    • /
    • pp.685-690
    • /
    • 1987
  • Adaptive design of IIR digiral filters using equation error method has been studied. In this paper, a design technique of IIR digital filters using output error method with adaptive compensator is presented. In computer simulation results, it is shown that flat response characteristic in pass-band, below-40[dB] attenuation characteristic in stop-band, sharf cut-off characteristic in transition-band, and phase characteristic is linearin pass-band.

  • PDF

초기 오차와 시간 지연을 고려한 선형 플랜트에 대한 강인한 반복 학습 제어기의 설계 (Design of robust iterative learning controller for linear plant with initial error and time-delay)

  • 박광현;변증남;황동환
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
    • /
    • pp.335-338
    • /
    • 1996
  • In this paper, we are going to design an iterative learning controller with the robust properties for initial error. For this purpose, the PID-type learning law will be considered and the design guide-line will be presented for the selection of the learning gain. Also, we are going to suggest a condition for the convergence of control input for a plant with input delay. Several simulation results are presented, which shows the effectiveness of the proposed algorithms.

  • PDF