• 제목/요약/키워드: deposited layer

검색결과 2,401건 처리시간 0.03초

말레에이트계 LB초박막의 이방성 전기전도 특성의 해석 (Analysis of Anisotropical Electrical Conduction Properties of Maleate System LB Ultra-thin Films)

  • 최용성;김도균;유승엽;권영수
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권1호
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    • pp.13-18
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    • 2000
  • We have fabricated LB ultra-thin films of maleate system by LB technique and evaluated the deposited status of LB ultra-thin films by I-V characteristics such as capacitance. It was found that the thickness of LB ultra-thin per layer is $27~30[{\AA}]$ by XRD. And, we have known that the conductivity along the horizontal direction of LB ultra-thin films was about $10^{-8}[S/cm]$, it corresponds to the semiconducting materials. Also, the I-V characteristics along the vertical direction of LB ultra-thin films was dominated by Schottky type current, the activation energy obtained by current-temperature characteristics was about 0.84[eV] and the conductivity was about $10^{-14}[S/cm]$, it corresponds to the insulator. And, the anisotropic conduction mechanism of the LB ultra-thin films in vertical direction and horizontal direction is determined by the hydrophilic group and the hydrophobic group in LB ultra-thin films. The above results are applicable to the semiconductor devices such as switching device, which function at the molecular level.

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자연 산화막과 엑시머 레이저를 이용한 Poly-Si/a-Si 이중 박막 다결정 실리콘 박막 트랜지스터 (Poly-Si Thin Film Transistor with poly-Si/a-Si Double Active Layer Fabricated by Employing Native Oxide and Excimer Laser Annealing)

  • 박기찬;박진우;정상훈;한민구
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제49권1호
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    • pp.24-29
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    • 2000
  • We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

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The Optical and Electrical Properties of Vacuum-Deposited Thin Films using Europium Complex [Eu(TTA)$_3$(phen)]

  • 이명호;김영관;이한성;김정수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 추계학술대회 논문집
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    • pp.53-56
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    • 1998
  • Electroluminescent(EL) devices based on organic materials have been of great interest due to their possible applications for large-area flat-panel displays, where they are attractive because of their capability of multicolor emission, and low operation voltage. In this study, glass substrate/ITO/Eu(TTA)$_3$(Phen)/Al(A), glass substrate/ITO/TPD/Eu(TTA)$_3$(p-hen)/Al(B) and glass substrate/ITO/TPD/Eu(TTA)$_3$(phen)/AlQ$_3$/Al(C) structures were fabricated by vacuum evaporation method. where aromatic diamine(TPD) was used as a hole transporting material, Eu(TTA)$_3$(phen) as an emitting material. and tris(8-hydroxyquinoline)Aluminum(AlQ$_3$) as an electron transporting layer. Electroluminescent(EL) and I-V characteristics of Eu(TTA)$_3$(Phen) with a various thickness were investigated. This structure shows the red EL spectrum, which is almost the same as the PL spectrum of Eu(TTA)$_3$(phen). I-V characteristics of this structure show that turn-on voltage was 9V and current density was 0.01A/$\textrm{cm}^2$ at a dc operation voltage of 9V. Electrical transporting phenomena of these structures was explained using the trapped- charge-limited current model with I-V characteristics.

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Cu/In 성분비에 따른 CuInS$_2$박막의 전기적 특성 (Electrical Properties of CuInS$_2$Ratio)

  • 박계춘;정우성;장영학;이진;정해덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1995년도 추계학술대회 논문집
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    • pp.109-112
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    • 1995
  • CuInS$_2$thin film was prepared by heat treatment at vacuum 10$\^$-3/ Torr of S/In/Cu stacked layer which was deposited by sequential. And so, the polycrystalline CuInS$_2$with chalcopyrite structure was well made at heat treatment temperature of 250$^{\circ}C$ and heat treatment time of 60 min. Single phase of CuInS$_2$was formed from Cu/In composition ratio of 0.84 to 1.3. p conduction type of CuInS$_2$thin film was appeared from Cu/In competition ratio of 0.99. The highest resistivity of CuInS$_2$with p type was 1.608${\times}$10$^2$$\Omega$cm at Cu/In composition ratio of 0.99 and The lowest resistivity was 5.587${\times}$10$\^$-2/$\Omega$cm at Cu/In composition ratio of 1.3.

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$(Ba_{0.5}Sr_{0.5})TiO_3$ 박막의 상부전극 RTA에 따른 계면 특성 변화 (Effect of RTA on the interfacial Properties of Top Electrodes on $(Ba_{0.5}Sr_{0.5})TiO_3$)

  • 전장배;김덕규;소순진;박춘배
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 추계학술대회 논문집 학회본부 C
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    • pp.740-742
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    • 1998
  • In this paper, we described the effect of rapid thermal annealing on the electrical properties of interfacial layer between various top electrodes and $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films. BST thin films were fabricated on Pt/TiN/$SiO_2$/Si substrate by RF magnetron sputtering technique. AI, Ag, and Cu films for the formation of top electrode were deposited on BST thin films by thermal evaporator. Top electrodes/BST/Pt capacitor annealed with rapid thermal annealing at various temperature. In $(Ba_{0.5}Sr_{0.5})TiO_3$ thin films with Cu top electrode annealed at $500^{\circ}C$, the dielectric constant was measured to the value of 366 at 1.2 [kHz] and the leakage current was obtained to the value of $5.85{\times}10^{-7}\;[A/cm^2}$ at the forward bias of 2 [V].

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Properties of ITO/Cu/ITO Multilayer Films for Application as Low Resistance Transparent Electrodes

  • Kim, Dae-Il
    • Transactions on Electrical and Electronic Materials
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    • 제10권5호
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    • pp.165-168
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    • 2009
  • Transparent and conducting ITO/Cu/ITO multilayered films were deposited by magnetron sputtering on unheated polycarbonate (PC) substrates. The thickness of the Cu intermediate film was varied from 5 to 20 nm. Changes in the microstructure and optoelectrical properties of ITO/Cu/ITO films were investigated with respect to the thickness of the Cu intermediated layer. The optoelectrical properties of the films were significantly influenced by the thickness of the Cu interlayer. The sandwich structure of ITO 50 nm/Cu 5 nm/ITO 45 nm films had a sheet resistance of $36{\Omega}$/Sq. and an optical transmittance of 67% (contain substrate) at a wavelength of 550 nm, while the ITO 50 nm/Cu 20 nm/ITO 30 nm films had a sheet resistance of $70{\Omega}$/Sq. and an optical transmittance of 36%. The electrical and optical properties of ITO/Cu/ITO films were determined mainly by the Cu film properties. From the figure of merit, it is concluded that the ITO/Cu/ITO films with a 5 nm Cu interlayer showed the better performance in transparent conducting electrode applications than the conventional ITO films.

Excimer Laser Annealing 결정화 방법 및 고유전 게이트 절연막을 사용한 poly-Si TFT의 특성 (Characteristics of poly-Si TFTs using Excimer Laser Annealing Crystallization and high-k Gate Dielectrics)

  • 이우현;조원주
    • 한국전기전자재료학회논문지
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    • 제21권1호
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    • pp.1-4
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    • 2008
  • The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

희토류 금속을 이용한 니켈 실리사이드의 전기 및 물리적 특성 (Electrical and Physical Characteristics of Nickel Silicide using Rare-Earth Metals)

  • 이원재;김도우;김용진;정순연;왕진석
    • 한국전기전자재료학회논문지
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    • 제21권1호
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    • pp.29-34
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    • 2008
  • In this paper, we investigated electrical and physical characteristics of nickel silicide using rare-earth metals(Er, Yb, Tb, Dy), Incorporated Ytterbium into Ni-silicide is proposed to reduce work function of Ni-silicide for nickel silicided schottky barrier diode (Ni-silicided SBD). Nickel silicide makes ohmic-contact or low schottky barrier height with p-type silicon because of similar work function (${\phi}_M$) in comparison with p-type silicon. However, high schottky barrier height is formed between Ni-silicide and p-type substrate by depositing thin ytterbium layer prior to Ni deposition. Even though the ytterbium is deposited below nickel, ternary phase $Yb_xN_{1-x}iSi$ is formed at the top and inner region of Ni-silicide, which is believed to result in reduction of work function about 0.15 - 0.38 eV.

R-면 사파이어 기판 위에 제작된 계단형 모서리 조셉슨 접합의 특성 (Fabrication and Characterization of Step-Edge Josephson Junctions on R-plane Al$_2O_3$ Substrates)

  • 임해용;김인선;김동호;박용기;박종철
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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    • pp.147-151
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    • 1999
  • YBCO step-edge Josephson junction were fabricated on sapphire substrates. The steps were formed on R-plane sapphire substrates by using Ar ion milling with PR masks. The step angle was controlled in the wide range from 25$^{\circ}$ to 50$^{\circ}$ by adjusting both the Ar ion incident angle and the photoresist mask rotation angle relative to the incident Ar ion beam. CeO$_2$ buffer layer and in-situ YBa$_2Cu_3O_{7-{\delta}}$ (YBCO) thin films was deposited on the stepped R-plane sapphire substrates by pulsed laser deposition method. The YBCO film thickness was varied to obtain the ratio of film thickness to step height in the range from 0.5 to 1. The step edge junction exhibited RSJ-like behaviors with I$_cR_n$ product of 100 ${\sim}$ 300 ${\mu}$V, critical current density of 10$^3$ ${\sim}$ 10$^5$ A/ cm$^2$ at 77 K.

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저항형 초전도 한류소자의 퀜치 특성 (Quench Characteristics of Resistive Superconducting Fault Current Limiters)

  • 김혜림;현옥배;최효상;황시돌;김상준
    • 한국초전도학회:학술대회논문집
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    • 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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    • pp.214-217
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    • 1999
  • We investigated the quench characteristics of meander line type resistive superconducting fault current limiters based on YBCO thin films grown on 2" diameter LaAlO$_3$ substrates. A gold layer was deposited onto the 0.4 ${\mu}$ m thick YBCO film to disperse the heat generated at hot spots, prior to patterning into 1 mm wide meander lines by photolithography. The limiters were tested with simulated fault currents of various amplitudes. The quench started at 10 A and was completed within 1 msec at the fault current of 65 A$_{peak}$. The dynamic quench characteristics were explained based on the heat conduction within the film and the heat transfer between the film and the surrounding liquid nitrogen. The heat transfer coefficient per unit area was estimated to be 3.0 W/cm$^2$K.

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