• Title/Summary/Keyword: data transmitter

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Additional Data Transmission Technology for T-DMB Systems using MOK-SS mapping (MOK-SS매핑 기반의 T-DMB 부가데이터 전송기법)

  • Cha, Jae-Sang;Lee, Min-Ho;Kim, Gun;Park, So-Ra;Lee, Yong-Tae;Kim, Jin-Young;Bae, Jung-Nam
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.5
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    • pp.123-127
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    • 2009
  • In this paper, we suggested new additional data transmission technology for T-DMB system using MOK-SS(Mary Orthogonal Keying- Spread Spectrum)mapping method. We applied revised watermarking method of TxID(Transmitter Identification) technology mainly had been used for conventional ATSC-DTV(Advanced Television Systems Committee - Digital TV). And proposed schemes enhanced additional data rate using MOK-SS mapping method. We certified availability of our proposed technology by using various simulation and error rate performance analysis.

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Den of I/O Controller for Future Communication Platform (차세대 통신 플랫폼을 위한 입출력 컨트롤러 설계)

  • Hyun Eugin;Seong Kwang-Su
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.4 s.304
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    • pp.59-68
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    • 2005
  • In this paper, we design a PCI Express controller for future communication system The controller supports the full functionality of Transaction Layer and Data Link Layer of PCI Express. The designed controller has the proposed transmitter buffer architecture to obey Replay mechanism. This scheme merges the transmitting buffer and the replay buffer. The proposed buffer has the higher data transfer efficiency than the conventional buffer architecture because it can dynamically adjust size of a replay buffer space. We also design transmitter of Transmitter Transaction Layer to effectively support the proposed buffer, The receiver device of PCI Express must possess the buffer for three types of transaction to support Flow Control. And it must report the amount of the buffer space regularly to the Port at the opposite end of the link. We propose the simple receiver buffer scheme using only one buffer to easily support Flow Control. And the designed controller is verified under proposed test bench

Performance analysis of UWB receiver using PPM and BPSK modulation scheme in the LR-WPAN System (LR-WPAN 시스템에서 PPM+BPSK 변조 방식을 사용하는 UWB 송수신기의 성능 분석)

  • Lee, Kyoung-Tak;Lim, Dong-Guk;Sohn, Sung-Hwan;Kim, Jae-Moung
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.5 no.2 s.10
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    • pp.19-28
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    • 2006
  • In the IEEE 802.15.4a system, they require simple, economical and low power consumption transmitter and receiver to transmit low rate data and to identify distance and location. To meet these requirements, LR-WPAN system use transmitter and receiver with simple modulation and demodulation scheme. In this paper, use PPM+BPSK modulation and windowing scheme to overcome multipath fading effect. Then we apply this channel estimation scheme to LR-WPAN system and compare performance depends on transmitter scheme. Proposed method using preamble to find channel characteristic out and we compensate distorted data with that information. Therefore we can detect signal easily at the demodulation part. Simulation result shows that performance evaluation is greater at the NLOS channel than LOS channel no matter what the receiver scheme.

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UART-to-APB Interface Circuit Design for Testing a Chip (칩 테스트를 위한 UART-to-APB 인터페이스 회로의 설계)

  • Seo, Young-Ho;Kim, Dong-wook
    • Journal of Advanced Navigation Technology
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    • v.21 no.4
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    • pp.386-393
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    • 2017
  • Field programmable gate arrays (FPGAs) are widely used for verification in chip development. In order to verify the circuit programmed to the FPGA, data must be input to the FPGA. There are many ways to communicate with a chip through a PC and an external board, but the simplest and easiest way is to use a universal asynchronous receiver/transmitter (UART). Most recently, most circuits are designed to be internally connected to the advanced microcontroller bus architecture (AMBA) bus. In other words, to verify the designed circuit easily and simply, data must be transmitted through the AMBA bus through the UART. Also the AMBA bus has been available in various versions since version 4.0 recently. Advanced peripheral bus (APB) is suitable for simple testing. In this paper, we design a circuit for UART-to-APB interface. Circuits designed using Verilog-HDL were implemented in Altera Cyclone FPGAs and were capable of operating at speeds up to 380 MHz.

A 3-GSymbol/s/lane MIPI C-PHY Transceiver with Channel Mismatch Correction Circuit (채널 부정합 보정 회로를 가진 3-GSymbol/s/lane MIPI C-PHY 송수신기)

  • Choi, Seokwon;Song, Changmin;Jang, Young-Chan
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1257-1264
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    • 2019
  • A 3-GSymbol/s/lane transceiver, which supports the mobile industry processor interface (MIPI) C-physical layer (PHY) specification version 1.1, is proposed. It performs channel mismatch correction to improve the signal integrity that is deteriorated by using three-level signals over three channels. The proposed channel mismatch correction is performed by detecting channel mismatches in the receiver and adjusting the delay times of the transmission data in the transmitter according to the detection result. The channel mismatch detection in the receiver is performed by comparing the phases of the received signals with respect to the pre-determined data pattern transmitted from the transmitter. The proposed MIPI C-PHY receiver is designed using a 65 nm complementary metal-oxide-semiconductor (CMOS) process with 1.2 V supply voltage. The area and power consumption of each transceiver lane are 0.136 ㎟ and 17.4 mW/GSymbol/s, respectively. The proposed channel mismatch correction reduces the time jitter of 88.6 ps caused by the channel mismatch to 34.9 ps.

Performance Analysis of the Dynamic Minislot reservation Protocol in Single-hop WDM Networks (단일-홉 파장분할 다중화 통신망에서 동적 미니슬롯 예약 프로토콜의 성능분석)

  • Jeong, Kil-Hyun;Lee, Jong-Kyu
    • Journal of KIISE:Information Networking
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    • v.29 no.3
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    • pp.205-215
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    • 2002
  • In this paper the Dynamic Minislot Reservation Protocol(DMRP) in which the control channel is divided into contention-less and contention minislots in order to reduce re-transmission probability in multicasting is proposed. In the network, earth node has two pairs of transceivers. A transceiver consisting of a fixed transmitter and a fixed receiver is used to control packet registration and the other transceiver is used to transmit data. Two types f transceivers for data transmission are considered : one is FT-TR(Fixed Transmitter-Tunable Receiver) and the other is TT-TR(Tunable Transmitter-Tunable Receiver). In the analysis, FT-TR and TT-TR single-hop passive star networks are compared. As results, we conclude that the DMRP protocol with dynamically divided control channel has improved the system performance such as throughput and system delay regardless of traffic type or network structure.

Implementation of the Burst Mode Fiber Optic Transmitter by Digital Temperature Compensation Architecture (디지털 온도보상에 의한 버스트 모드 광송신기의 구현)

  • Kang, Ho-Yong;Chai, Sang-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.12-17
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    • 2009
  • We have implement어 a bust mode optical transmitter using digital temperature compensation architecture with a microprocessor. Instead of previous analog real time technique, we used digital sampling and holding technique for the temperature compensation in order to get stable high speed data transmission of the laser diode. This digital temperature compensation technique should be complemented the previous analog method with accuracy and effectiveness in the over Gb/s transmitting application.

Joint Compensation of Transmitter and Receiver IQ Imbalance in OFDM Systems Based on Selective Coefficient Updating

  • Rasi, Jafar;Tazehkand, Behzad Mozaffari;Niya, Javad Musevi
    • ETRI Journal
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    • v.37 no.1
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    • pp.43-53
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    • 2015
  • In this paper, a selective coefficient updating (SCU) approach at each branch of the per-tone equalization (PTEQ) structure has been applied for insufficient cyclic prefix (CP) length. Because of the high number of adaptive filters and their complex adaption process in the PTEQ structure, SCU has been proposed. Using this method leads to a reduction in the computational complexity, while the performance remains almost unchanged. Moreover, the use of set-membership filtering with variable step size is proposed for a sufficient CP case to increase convergence speed and decrease the average number of calculations. Simulation results show that despite the aforementioned algorithms having similar performance in comparison with conventional algorithms, they are able to reduce the number of calculations necessary. In addition, compensation of both the channel effect and the transmitter/receiver in-phase/quadrature-phase imbalances are achievable by these algorithms.

Design and Implementation of A PC Protection using RF Transmitter-Receiver (RF 송수신기를 이용한 PC 보안 설계 및 구현)

  • Lee, Keun-Wang;Park, Il-Ho
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.2
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    • pp.287-293
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    • 2009
  • This paper would suggest about data communicate using RF Transmitter-Receiver and about PC protection method authenticate using software of PC which Receiver is connected. Older PC protection system is demanded manual operation of the user but the suggesting method protect PC automatically with judge existing of the user who has Tag approaches the distance which gets near. And it is impossible about the forgery and it is safe about sniffing attack and spoofing.

Remote Impedance-based Loose Bolt Inspection Using a Radio-Frequency Active Sensing Node

  • Park, Seung-Hee;Yun, Chung-Bang;Inman, Daniel J.
    • Journal of the Korean Society for Nondestructive Testing
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    • v.27 no.3
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    • pp.217-223
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    • 2007
  • This paper introduces an active sensing node using radio-frequency (RF) telemetry. This device has brought the traditional impedance-based structural health monitoring (SHM) technique to a new paradigm. The RF active sensing node consists of a miniaturized impedance measuring device (AD5933), a microcontroller (ATmega128L), and a radio frequency (RF) transmitter (XBee). A macro-fiber composite (MFC) patch interrogates a host structure by using a self-sensing technique of the miniaturized impedance measuring device. All the process including structural interrogation, data acquisition, signal processing, and damage diagnostic is being performed at the sensor location by the microcontroller. The RF transmitter is used to communicate the current status of the host structure. The feasibility of the proposed SHM strategy is verified through an experimental study inspecting loose bolts in a bolt-jointed aluminum structure.