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http://dx.doi.org/10.12673/jant.2017.21.4.386

UART-to-APB Interface Circuit Design for Testing a Chip  

Seo, Young-Ho (Ingenium College of Liberal Arts, Kwangwoon University)
Kim, Dong-wook (Department of Electronic Materials Engineering, Kwangwoon University)
Publication Information
Journal of Advanced Navigation Technology / v.21, no.4, 2017 , pp. 386-393 More about this Journal
Abstract
Field programmable gate arrays (FPGAs) are widely used for verification in chip development. In order to verify the circuit programmed to the FPGA, data must be input to the FPGA. There are many ways to communicate with a chip through a PC and an external board, but the simplest and easiest way is to use a universal asynchronous receiver/transmitter (UART). Most recently, most circuits are designed to be internally connected to the advanced microcontroller bus architecture (AMBA) bus. In other words, to verify the designed circuit easily and simply, data must be transmitted through the AMBA bus through the UART. Also the AMBA bus has been available in various versions since version 4.0 recently. Advanced peripheral bus (APB) is suitable for simple testing. In this paper, we design a circuit for UART-to-APB interface. Circuits designed using Verilog-HDL were implemented in Altera Cyclone FPGAs and were capable of operating at speeds up to 380 MHz.
Keywords
Universal asynchronous receiver/transmitter; Advanced microcontroller bus architecture; Advanced peripheral bus; Field programmable gate array; Chip design;
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