• Title/Summary/Keyword: data algorithm system

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Implementation of ATM/Internet Gateway System for Real Time Multimedia Service (실시간 멀티미디어 서비스를 위한 ATM/Internet 게이트웨이 시스템의 구현)

  • Han Tae-Man;Jeong You-Hyeon;Kim Dong-Won
    • The KIPS Transactions:PartC
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    • v.11C no.6 s.95
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    • pp.799-806
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    • 2004
  • A growing diversity of pervasive devices is gaming access to the Internet and other information. However, much of the rich multimedia contents cannot be easily handled by the client devices because of the limited communication, processing, storage and display capabilities. The in-tegration of voice, data and video service modified the target of networking technologies. Networks must have some the capabilities for in-tegration of various services and also for QoS support as required by each of those service. Because of these reasons, we developed EAGIS(Efficient ATM Gateway for real time Internet Service) to provide seamless multimedia service between the ATM network and the Internet. EAGIS consists of the interworking unit, content server, transcoding server, and the serveice broker to provide seamless multimedia service be-tween the ATM network and the Internet. In this paper, we design the architecture and transcoding service scenario of the EAGIS. When the RTP is used for the bi-directional communication, transcoding time is configured by the time-stamp of RTCP. When HTTP is used for unidirec-tional communication, self-timer is used. By using these reference time, standard transcoding method is applicable according to the frame trans-mission rate and network traffic load. And we can also assure the QoS of the multiple users` effective bandwidth by our algorithm.

A Development of Fusion Processor Architecture for Efficient Main Memory Access in CPU-GPU Environment (CPU-GPU환경에서 효율적인 메인메모리 접근을 위한 융합 프로세서 구조 개발)

  • Park, Hyun-Moon;Kwon, Jin-San;Hwang, Tae-Ho;Kim, Dong-Sun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.2
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    • pp.151-158
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    • 2016
  • The HSA resolves an old problem with existing CPU and GPU architectures by allowing both units to directly access each other's memory pools via unified virtual memory. In a physically realized system, however, frequent data exchanges between CPU and GPU for a virtual memory block result bottlenecks and coherence request overheads. In this paper, we propose Fusion Processor Architecture for efficient access of main memory from both CPU and GPU. It consists of Job Manager, Re-mapper, and Pre-fetcher to control, organize, and distribute work loads and working areas for GPU cores. These components help on reducing memory exchanges between the two processors and improving overall efficiency by eliminating faulty page table requests. To verify proposed algorithm architectures, we develop an emulator based on QEMU, and compare several architectures such as CUDA(Compute Unified Device Architecture), OpenMP, OpenCL. As a result, Proposed fusion processor architectures show 198% faster than others by removing unnecessary memory copies and cache-miss overheads.

Review on the Three-Dimensional Inversion of Magnetotelluric Date (MT 자료의 3차원 역산 개관)

  • Kim Hee Joon;Nam Myung Jin;Han Nuree;Choi Jihyang;Lee Tae Jong;Song Yoonho;Suh Jung Hee
    • Geophysics and Geophysical Exploration
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    • v.7 no.3
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    • pp.207-212
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    • 2004
  • This article reviews recent developments in three-dimensional (3-D) magntotelluric (MT) imaging. The inversion of MT data is fundamentally ill-posed, and therefore the resultant solution is non-unique. A regularizing scheme must be involved to reduce the non-uniqueness while retaining certain a priori information in the solution. The standard approach to nonlinear inversion in geophysis has been the Gauss-Newton method, which solves a sequence of linearized inverse problems. When running to convergence, the algorithm minimizes an objective function over the space of models and in the sense produces an optimal solution of the inverse problem. The general usefulness of iterative, linearized inversion algorithms, however is greatly limited in 3-D MT applications by the requirement of computing the Jacobian(partial derivative, sensitivity) matrix of the forward problem. The difficulty may be relaxed using conjugate gradients(CG) methods. A linear CG technique is used to solve each step of Gauss-Newton iterations incompletely, while the method of nonlinear CG is applied directly to the minimization of the objective function. These CG techniques replace computation of jacobian matrix and solution of a large linear system with computations equivalent to only three forward problems per inversion iteration. Consequently, the algorithms are efficient in computational speed and memory requirement, making 3-D inversion feasible.

Ciphering Scheme and Hardware Implementation for MPEG-based Image/Video Security (DCT-기반 영상/비디오 보안을 위한 암호화 기법 및 하드웨어 구현)

  • Park Sung-Ho;Choi Hyun-Jun;Seo Young-Ho;Kim Dong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.2 s.302
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    • pp.27-36
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    • 2005
  • This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.

A design and implementation of Face Detection hardware (얼굴 검출을 위한 SoC 하드웨어 구현 및 검증)

  • Lee, Su-Hyun;Jeong, Yong-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.43-54
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    • 2007
  • This paper presents design and verification of a face detection hardware for real time application. Face detection algorithm detects rough face position based on already acquired feature parameter data. The hardware is composed of five main modules: Integral Image Calculator, Feature Coordinate Calculator, Feature Difference Calculator, Cascade Calculator, and Window Detection. It also includes on-chip Integral Image memory and Feature Parameter memory. The face detection hardware was verified by using S3C2440A CPU of Samsung Electronics, Virtex4LX100 FPGA of Xilinx, and a CCD Camera module. Our design uses 3,251 LUTs of Xilinx FPGA and takes about 1.96${\sim}$0.13 sec for face detection depending on sliding-window step size, when synthesized for Virtex4LX100 FPGA. When synthesized on Magnachip 0.25um ASIC library, it uses about 410,000 gates (Combinational area about 345,000 gates, Noncombinational area about 65,000 gates) and takes less than 0.5 sec for face realtime detection. This size and performance shows that it is adequate to use for embedded system applications. It has been fabricated as a real chip as a part of XF1201 chip and proven to work.

40Gb/s Foward Error Correction Architecture for Optical Communication System (광통신 시스템을 위한 40Gb/s Forward Error Correction 구조 설계)

  • Lee, Seung-Beom;Lee, Han-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.101-111
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    • 2008
  • This paper introduces a high-speed Reed-Solomon(RS) decoder, which reduces the hardware complexity, and presents an RS decoder based FEC architecture which is used for 40Gb/s optical communication systems. We introduce new pipelined degree computationless modified Euclidean(pDCME) algorithm architecture, which has high throughput and low hardware complexity. The proposed 16 channel RS FEC architecture has two 8 channel RS FEC architectures, which has 8 syndrome computation block and shared single KES block. It can reduce the hardware complexity about 30% compared to the conventional 16 channel 3-parallel FEC architecture, which is 4 syndrome computation block and shared single KES block. The proposed RS FEC architecture has been designed and implemented with the $0.18-{\mu}m$ CMOS technology in a supply voltage of 1.8 V. The result show that total number of gate is 250K and it has a data processing rate of 5.1Gb/s at a clock frequency of 400MHz. The proposed area-efficient architecture can be readily applied to the next generation FEC devices for high-speed optical communications as well as wireless communications.

Implementation of Smart Metering System Based on Deep Learning (딥 러닝 기반 스마트 미터기 구현)

  • Sun, Young Ghyu;Kim, Soo Hyun;Lee, Dong Gu;Park, Sang Hoo;Sim, Issac;Hwang, Yu Min;Kim, Jin Young
    • Journal of IKEEE
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    • v.22 no.3
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    • pp.829-835
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    • 2018
  • Recently, studies have been actively conducted to reduce spare power that is unnecessarily generated or wasted in existing power systems and to improve energy use efficiency. In this study, smart meter, which is one of the element technologies of smart grid, is implemented to improve the efficiency of energy use by controlling power of electric devices, and predicting trends of energy usage based on deep learning. We propose and develop an algorithm that controls the power of the electric devices by comparing the predicted power consumption with the real-time power consumption. To verify the performance of the proposed smart meter based on the deep running, we constructed the actual power consumption environment and obtained the power usage data in real time, and predicted the power consumption based on the deep learning model. We confirmed that the unnecessary power consumption can be reduced and the energy use efficiency increases through the proposed deep learning-based smart meter.

Impact of Contrast Agent for PET Images with CT-based Attenuation Correction (CT 영상을 이용한 감쇠 보정 시 조영제가 PET 영상에 미치는 영향)

  • Son Hye-Kyung;Turkington Timothy G.;Kwon Yun-Young;Jung Haijo;Kim Hee-Joung
    • Progress in Medical Physics
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    • v.16 no.4
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    • pp.192-201
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    • 2005
  • Experiments and simulation were done to study the impact of contrast agent when CT scan was used to attenuation correction for PET Images in PET/CT system. Whole body phantom was imaged with various concentration of iodine-based contrast agent using CT. Mathematical emission and transmission density map with liver were made to simulate for whole body FDG Imaging. A variety of factors were estimated, including non-uniform enhancement of contrast agent, concentration and distribution size of contrast agent, noise level, image resolution, reconstruction algorithm, hypo-attenuation of contrast agent, and different time phases for contrast agent. Experimental studies showed that Hounsfield unit depends on the concentration of contrast agent and tube voltage. From the simulation data, contrast agents Introduced artifacts and degraded image quality on the attenuation-corrected PET images. The severity of these effects depends on a variety of factors, including the concentration and distribution size of contrast agent, the noise levels, and the Image resolution. These results Indicated that the impact of contrast agents should be considered with a full understanding of their potential problems in clinical PET/CT images.

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Digital Tomosynthesis for Patient Alignment System Using Half-fan Mode CBCT Projection Images (Half-fan 모드를 이용한 방사선치료환자 위치교정을 위한 디지털영상 합성영상기술에 관한 예비연구)

  • Park, Justin C.;Park, Sung-Ho;Kim, Jin-Sung;Han, Young-Yih;Ju, Sang-Gyu;Shin, Eun-Hyuk;Shin, Jung-Suk;Park, Hee-Chul;Ahn, Yong-Chan;Song, Willian Y.
    • Progress in Medical Physics
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    • v.21 no.4
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    • pp.360-366
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    • 2010
  • To generate on-board digital tomosynthesis (DTS) for three-dimensionalimage-guided radiation therapy (IGRT) as an alternative to conventional portal imaging or on-board cone-beam computed tomography (CBCT), two clinical cases (liver and bladder) were selected to illustrate the capabilities of on-board DTS for IGRT. DTS images were generated from subsets of CBCT projection data (45, 162 projections) using half-fan mode scanning with a Feldkamp-type reconstruction algorithm. Digital tomosynthesis slices appeared similar to coincident CBCT planes and yielded substantially more anatomic information. Improved bony and soft-tissue visibility in DTS images is likely to improve target localization compared with radiographic verification techniques and might allow for daily localization of a soft-tissue target. Digital tomosynthesis might allow targeting of the treatment volume on the basis of daily localization.

Comparison of Feature Performance in Off-line Hanwritten Korean Alphabet Recognition (오프라인 필기체 한글 자소 인식에 있어서 특징성능의 비교)

  • Ko, Tae-Seog;Kim, Jong-Ryeol;Chung, Kyu-Sik
    • Korean Journal of Cognitive Science
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    • v.7 no.1
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    • pp.57-74
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    • 1996
  • This paper presents a comparison of recognition performance of the features used inthe recent handwritten korean character recognition.This research aims at providing the basis for feature selecion in order to improve not only the recognition rate but also the efficiency of recognition system.For the comparison of feature performace,we analyzed the characteristics of theose features and then,classified them into three rypes:global feature(image transformation)type,statistical feature type,and local/ topological feature type.For each type,we selected four or five features which seem more suitable to represent the characteristics of korean alphabet,and performed recongition experiments for the first consonant,horizontal vowel,and vertical vowel of a korean character, respectively.The classifier used in our experiments is a multi-layered perceptron with one hidden layer which is trained with backpropagation algorithm.The training and test data in the experiment are taken from 30sets of PE92. Experimental results show that 1)local/topological features outperform the other two type features in terms of recognition rates 2)mesh and projection features in statical feature type,walsh and DCT features in global feature type,and gradient and concavity features in local/topological feature type outperform the others in each type, respectively.

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