• 제목/요약/키워드: current-voltage

검색결과 11,652건 처리시간 0.038초

CVD증착에 의한 인버티드 스태거형 TFT의 전압 전류 특성 (Current and voltage characteristics of inverted staggered type amorphous silicon thin film transistor by chemical vapour deposition)

  • 이우선;박진성;이종국
    • E2M - 전기 전자와 첨단 소재
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    • 제9권10호
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    • pp.1008-1012
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    • 1996
  • I-V, C-V characteristics of inverted staggered type hydrogenerated amorphous silicon thin film transistor(a-Si:H TFT) was studied and experimentally verified. The results show that the log-log plot of drain current increased by voltage increase. The saturated drain current of DC output characteristics increased at a fixed gate voltage. According to the increase of gate voltage, activation energy of electron and the increasing width of Id at high voltage were decreased. Id saturation current saturated at high Vd over 4.5V, Vg-ld hysteresis characteristic curves occurred between -15V and 15V of Vg. Hysteresis current decreased at low voltage of -15V and increased at high voltage of 15V.

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누설전류측정에 의한 피뢰기 열화진단기술에 있어 전원고조파의 영향 (Influence of System Voltage Harmonics on Arrester Deterioration Diagnostic Techniques by Leakage Current Measurement)

  • 길경석;한주섭
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 제4회 영호남학술대회 논문집
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    • pp.142-145
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    • 2002
  • This paper describes an influence of system voltage harmonics on arrester deterioration diagnostic techniques based on leakage current measurement because the resistive current is composed of two components caused by nonlinear characteristics of arrester and by system voltage harmonics. Resistive leakage currents of arresters, which can be evaluated by the third harmonic component of total leakage currents, increase with its deterioration progress. In this paper, we developed a PSpice model for ZnO arrester to simulate the harmonics' effect described above. In simulation, pure sinusoidal voltage and the $3^{rd}$ harmonic voltage are applied to the model, and the leakage current changes are compared. The simulation results showed that the magnitudes of resistive leakage current depend not only on the phase of system voltage harmonics but also on the magnitude of it.

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A Low Voltage Bandgap Current Reference with Low Dependence on Process, Power Supply, and Temperature

  • Cheon, Jimin
    • 한국정보기술학회 영문논문지
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    • 제8권2호
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    • pp.59-67
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    • 2018
  • The minimum power supply voltage of a typical bandgap current reference (BGCR) is limited by operating temperature and input common mode range (ICMR) of a feedback amplifier. A new BGCR using a bandgap voltage generator (BGVG) is proposed to minimize the effect of temperature, supply voltage, and process variation. The BGVG is designed with proportional to absolute temperature (PTAT) characteristic, and a feedback amplifier is designed with weak-inversion transistors for low voltage operation. It is verified with a $0.18-{\mu}m$ CMOS process with five corners for MOS transistors and three corners for BJTs. The proposed circuit is superior to other reported current references under temperature variation from $-40^{\circ}C$ to $120^{\circ}C$ and power supply variation from 1.2 V to 1.8 V. The total power consumption is $126{\mu}W$ under the conditions that the power supply voltage is 1.2 V, the output current is $10{\mu}A$, and the operating temperature is $20^{\circ}C$.

불평형 전압 조건에서 스위칭 소자의 전류 용량과 순환전류를 고려한 HVDC-MMC 제어기법 (Control of HVDC-MMC Considering the Switching Device's Current Capacity and Circulating Current under Unbalanced Voltage Conditions)

  • 문지우;배득우;박정우;강대욱;유동욱;김장목
    • 전력전자학회논문지
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    • 제18권3호
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    • pp.270-278
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    • 2013
  • This paper proposes a control method for high voltage direct current(HVDC) with modular multilevel converter (MMC) under unbalanced voltage conditions considering the submodule(SM)'s current capacity and circulating current. It is aimed to propose a control method in which the current peak value does not exceed the maximum value of HVDC-MMC by considering the current capacity of the SM under unbalance voltage conditions. And it analyzes the effect of the unbalanced voltage on circulating currents in MMC and then proposes a control method considering each component of circulating currents under unbalanced voltages. The effectiveness of the proposed controlling method is verified through simulation results using PSCAD/EMTDC.

200 W급 LED 구동용 전원장치 설계 및 개발 (Design and Development of 200 W Power Converter)

  • 김형중;정규범
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2012년도 전력전자학술대회 논문집
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    • pp.242-243
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    • 2012
  • In this paper, 200 W power supply for LED driver has been designed, analyzed, simulated and tested. Input AC voltage of 100VAC-240VAC was converted to DC voltage by high power factor converter. Output voltage was controlled, and output current was controlled by constant current when output current was reached to LED maximum rated current. By simulation and experimental test, voltage and current control and high power factor characteristics are verified.

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Reducing Common-Mode Voltage of Three-Phase VSIs using the Predictive Current Control Method based on Reference Voltage

  • Mun, Sung-ki;Kwak, Sangshin
    • Journal of Power Electronics
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    • 제15권3호
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    • pp.712-720
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    • 2015
  • A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± Vdc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± Vdc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.

A Novel High-Performance Strategy for A Sensorless AC Motor Drive

  • Lee, Dong-Hee;Kwon, Young-Ahn
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제2B권3호
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    • pp.81-89
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    • 2002
  • The sensorless AC motor drive is a popular topic of study due to the cost and reliability of speed and position sensors. Most sensorless algorithms are based on the mathematical modeling of motors including electrical variables such as phase current and voltage. Therefore, the accuracy of such variables largely affects the performance of the sensorless AC motor drive. However, the output voltage of the SVPWM-VSI, which is widely used in sensorless AC motor drives, has considerable errors. In particular, the SVPWM-VSI is error-prone in the low speed range because the constant DC link voltage causes poor resolution in a low output voltage command and the output voltage is distorted due to dead time and voltage drop. This paper investigates a novel high-performance strategy for overcoming these problems in a sensorless ac motor drive. In this paper, a variation of the DC link voltage and a direct compensation for dead time and voltage drop are proposed. The variable DC link voltage leads to an improved resolution of the inverter output voltage, especially in the motor's low speed range. The direct compensation for dead time and voltage drop directly calculates the duration of the switching voltage vector without the modification of the reference voltage and needs no additional circuits. In addition, the proposed strategy reduces a current ripple, which deteriorates the accuracy of a monitored current and causes torque ripple and additional loss. Simulation and experimentation have been performed to verify the proposed strategy.

변압기 권선을 이용한 자속구속형 초전도 전류제한기의 전류제한 및 전압강하 보상 특성 (Current Limiting and Voltage Sag Compensation Characteristics of Flux-Lock Type SFCL Using a Transformer Winding)

  • 고석철
    • 한국전기전자재료학회논문지
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    • 제25권12호
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    • pp.1000-1003
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    • 2012
  • The superconducting fault current limiter (SFCL) can quickly limit the fault current shortly after the short circuit occurs and recover the superconducting state after the fault removes and plays a role in compensating the voltage sag of the sound feeder adjacent to the fault feeder as well as the fault current limiting operation of the fault feeder. Especially, the flux-lock type SFCL with an isolated transformer, which consists of two parallel connected coils on an iron core and the isolated transformer connected in series with one of two coils, has different voltage sag compensating and current limiting characteristics due to the winding direction and the inductance ratio of two coils. The current limiting and the voltage sag compensating characteristics of a SFCL using a transformer winding were analyzed. Through the analysis on the short-circuit tests results considering the winding direction of two coils, the SFCL designed with the additive polarity winding has shown the higher limited fault current than the SFCL designed with the subtractive polarity winding. It could be confirmed that the higher fault current limitation of the SFCL could be contributed to the higher load voltage sag compensation.

선형 캐스코드 전류모드 적분기 (Linear cascode current-mode integrator)

  • 김병욱;김대익
    • 한국전자통신학회논문지
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    • 제8권10호
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    • pp.1477-1483
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    • 2013
  • 연속시간 전류모드 기저대역 채널선택 필터 설계를 위하여 전류이득과 단위이득 주파수를 개선시킨 저전압 선형 캐스코드 전류모드 적분기를 제안하였다. 제안된 전류모드 적분기는 CMOS 상보형 회로로 구성된 완전 차동 형태의 입 출력단으로 구성하였으며, 여기에 캐스코드 트랜지스터를 추가시킴으로써 바이어스 단을 구성하여 선형영역에서 동작시켜 저전압 구조에 적합하도록 설계하였다. 이 때 바이어스 전압을 선택적으로 제어하여 주파수 대역이 가변될 수 있도록 설계하였다. 시뮬레이션 결과를 통해 설계한 선형 캐스코드 전류모드 적분기가 저전압 동작, 전류 이득 및 단위이득 주파수 등 모두 만족할 만한 특성을 가지고 있음을 확인하였다.

병렬연결된 두 코일의 자기결합을 이용한 초전도 전류제한기의 전류제한 및 전압강하 보상 특성 분석 (Analysis on Current Limiting and Voltage Sag Compensating Characteristics of a SFCL using Magnetic Coupling of Parallel Connected Two Coils)

  • 임성훈
    • 한국전기전자재료학회논문지
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    • 제23권2호
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    • pp.159-163
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    • 2010
  • The superconducting fault current limiter (SFCL) plays a role in compensating the voltage sag of the sound feeder adjacent to the fault feeder as well as the fault current limiting operation of the fault feeder. Especially, the SFCL using magnetic coupling of two coils with parallel connection has different voltage sag compensating and current limiting characteristics due to the winding direction and the inductance ratio of two coils. In this paper, the current limiting and the voltage sag compensating characteristics of a SFCL using magnetic coupling of parallel connected two coils were analyzed. Through the analysis on the experimental results considering the winding direction of two coils, the SFCL designed with the additive polarity winding was shown to have the higher limited fault current than the SFCL designed with the subtractive polarity winding. In addition, it could be confirmed that the higher fault current limitation of the SFCL could be contributed to the higher load voltage sag compensation.