• Journal of Magnetics
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• v.17 no.2
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• pp.78-82
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• 2012

CoNiFe(CNF)/$BaTiO_3(BTO)$/CoNiFe(CNF) multilayered thin films were deposited on Pt/Ti/$SiO_2$/Si substrates by using pulsed laser deposition (PLD) system. We fabricated three different thin films of BTO, BTO/CNF and CNF/BTO/CNF for magneto-capacitor and studied their crystalline structure, surface and interface morphology, and magnetic and electrical properties. When three different structures of multilayered thin film were compared, magnetization of CNF/BTO/CNF thin films was decreased by magnetic and dielectric interaction. Also we confirmed that capacitance of CNF/BTO/CNF multilayered thin film was enhanced as being near tetragonal structure with increasing of c/a ratio because of atomic bonding at interface between BTO dielectric and CNF magnetic materials. Finally, we studied the change of the capacitance of CNF/BTO/CNF multilayered thin film with magnetic field for emergence of magnetocapacitance and suggested a possibility of enhanced capacitance.

• Journal of the Korean Ceramic Society
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• v.41 no.2
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• pp.106-110
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• 2004

Nickel oxide (NiO) thin films were prepared on Si(100) substrates at room temperature by RF magnetron sputtering using a NiO target. The effects of oxygen flow ratio for the plasma gas on the preferred orientation and surface morphology of the NiO films were investigated. Highly crystalline NiO film with (100) orientation was obtained when it was deposited in pure Ar gas. For NiO film deposited in pure O$_2$ gas, on the other hand, the orientation of the film changed from (100) to (111) and its deposition rate decreased. The origin of the preferred orientation of the films was discussed. NiO films also showed different surface morphologies and roughnesses with the oxygen flow ratio.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.1034-1037
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• 2003

Microcrystalline silicon(c-Si:H) thin-film solar cells are prepared with intrinsic Si-layer by hot wire CVD. The operating parameters of solar cells are strongly affected by the filament temperature ($T_f$) during intrinsic layer. Jsc and efficiency abruptly decreases with elevated $T_f$ to $1400^{\circ}C$. This deterioration of solar cell parameters are resulted from increase of crystalline volume fraction and corresponding defect density at high $T_f$. The heater temperature ($T_h$) are also critical parameter that controls device operations. Solar cells prepared at low $T_h$ ($<200^{\circ}C$) shows a similar operating properties with devices prepared at high $T_f$, i.e. low Jsc, Voc and efficiency. The origins for this result, however, are different with that of inferior device performances at high $T_f$. In addition the phase transition of the silicon films occurs at different silane concentration (SC) by varying filament temperature, by which highest efficiency with SC varies with $T_f$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.21-24
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• 1997

Ferroeletric LiNbO$_3$ thin films hale been prepared directly on Si(100) substrates by conventional RF magnetron spurttering system for nonvolatile memory applications. As-deposited films were performed RTA(Rapid Thermal Annealing) treatment in an oxygen atmosphere at 600 $^{\circ}C$ for 60 s. The rapid thermal annealed films were changed to poly-crystalline ferroelectric nature from amorphous of as-deposition. The resistivity of the ferroelectric LiNbO$_3$ film was increased from a typical vague of 1~2$\times$10$^{8}$ $\Omega$.cm before the annealing to about 1$\times$10$^{13}$ $\Omega$.cm at 500 kV/cm and reduce the interface state density of the LiNbO$_3$/Si(100) interface to about 1$\times$10$^{11}$ cm$^2$ . eV. Ferroelectric hysteresis measurements using a Sawyer-Tower circuit yielded remanent polarization (Pr) and coercive field (Ec) values of about 1.2 $\mu$C/cm$^2$ and 120 kV/cm, respectively.

• Korean Journal of Materials Research
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• v.4 no.4
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• pp.416-427
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• 1994

The changes of crystallinity and microstructure and the $Si_{1-x}Ge_x/Sio_2$ interfaces of $Si_{1-x}Ge_x$ alloys deposited on amorphous $SiO_{2}$ were studied as a function of deposition temperature. The crystallinity, microstructure, and compositional uniformity of $Si_{1-x}Ge_x$ alloys deposited on the SiOl at different temperature were investigated by X-ray diffraction and transmission electron microscopy. And $Si_{1-x}Ge_x/Sio_2$ interface were investigated by high-resolution transmission electron microscopy. The $Si_{0.7}Ge_{0.3}/Sio_2$ films were deposited on amorphous $SiO_{2}$ at $300^{\circ}C,400^{\circ}C,500^{\circ}C,600^{\circ}C,$ and $700^{\circ}C$ by Si-MBE. In the film deposited at $300^{\circ}C$, only amorphous phase were observed. In the film deposited at $400^{\circ}C$, both amorphous and polycrystalline films were observed. Both phases were deposited simultaneously, but, at initial film growth, amorphous phase prevailed over polycrystalline phase. As the film thickness increased, the fraction of polycrystalline phase increased. At $500^{\circ}C$, thin amorphous layer was observed at lOnm from $SiO_{2}$ surface. In the films deposited at higher than $600^{\circ}C$, only crystalline phase were observed. Polycrystalline films had columnar structure. Compositional uniformity for deposited films were good regardless of deposition temperature. The interfaces of $Si_{1-x}Ge_x/Sio_2$ were flat, whatever polycrystal or amorphous was deposited on $SiO_{2}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.03a
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• pp.21-21
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• 2010

(Ba,Sr)$TiO_3$ (BST) thin film with a perovskite structure has potential for the practical application in various functional devices such as nonvolatile-memory components, capacitor, gate insulator of thin-film transistors, and electro-optic devices for display. Normally, the BST thin films derived from sol-gel and sputtering are amorphous or partially crystalline when processed below $600^{\circ}C$. For the purpose of integrating BST thin film directly into a Si-based read-out integrated circuit (ROIC), it is necessary to process the BST film below $400^{\circ}C$. The microstructural and electrical properties of low-temperature crystallized BST film were studied. The BST thin films have been fabricated at $350^{\circ}C$ by UV-assisted rapidly thermal annealing (RTA). The BST films are in a single perovskite phase and have well-defined electrical properties such as high dielectric constant, low dielectric loss, low leakage current density, and high breakdown voltage. Photoexcitation of the organics contained in the sol-gel-derived films by high-intensity UV irradiation facilitates elimination of the organics and formation of the single-crystalline phase films at low temperatures. The amorphous BST thin film was transformed to a highly (h00)-oriented perovskite structure by high oxygen pressure processing (HOPP) at as low as $350^{\circ}C$. The dielectric properties of BST film were comparable to (or even better than) those of the conventionally processed BST films prepared by sputtering or post-annealing at temperature above $600^{\circ}C$. When external pressure was applied to the well-known contractive BST system during annealing, the nucleation energy barrier was reduced; correspondingly, the crystallization temperature decreased. The UV-assisted RTA and HOPP, as compatible with existing MOS technology, let the BST films be integrated into radio-frequency circuit and mixed-signal integrated circuit below the critical temperature of $400^{\circ}C$.

• Korean Journal of Materials Research
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• v.13 no.5
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• pp.303-308
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• 2003

Amorphous carbon nitride films deposited on Si(001) substrates by a plasma enhanced chemical vapor deposition (PECVD) technique using CH$_4$and $N_2$as reaction gases were thermally annealed at various temperatures under$ N_2$atmosphere, then their physical properties were investigated particularly as a function of annealing temperature. Above $600^{\circ}C$ a small amount of crystalline $\beta$-$C_3$$N_4$ phase evolves, while the film surface becomes very rough due to agglomeration of fine grains on the surface. As the annealing temperature increases, both the hardness and the $sp^3$ bonding nature are enhanced. In contrast to our expectation, higher annealing temperature results in a relatively higher friction mainly due to big increase in roughness at that temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.571-574
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• 2000

In this study, Tin oxide thin film for secondary battery was deposited on Pt/Ti/Si(100). It was fabricated by r.f. reactive sputtering with Tin metal target. At constant power (130W), pressure (Base 5$\times$10$^{-6}$ Torr, working 5$\times$10$^{-3}$ Torr) and at room temperature, it was fabricated by Ar/O2 gas ratio. After deposition, we got AFM & SEM to investigated surface of thin films and had XRD to find crystalline of thin films. Charge/discharge characteristics were carried out in 1M LiPF$_{6}$ , EC:DMC = 1:1 liquid electrolyte using lithium metal at room temperature.

• Journal of Sensor Science and Technology
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• v.8 no.6
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• pp.476-480
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• 1999

PbSe thin films were grown using PLD method on the p-Si(100) substrate. To determine what crystalline structure of PbSe thin films have according to the growth temperature, the films were prepared under a substrate temperature changing between a room temperature and $400^{\circ}C$. As a result of analyzing XRD patterns of PbSe thin films prepared at various substrate temperatures and FWHM of PbSe(200) rocking curve, it was found that PbSe thin film obtained at the growth temperature of $200^{\circ}C$ was best crystallized. In addition, the surface morphology of PbSe thin film observed using AFM found itself having the most regularly arranged particles in case of growing the film at $200^{\circ}C$. The measurement of Hall effect indicated that PbSe thin films were n-type semiconductors and that current-voltage characteristic curve exhibit the typical p-n junction phenomenon. In addition, electric conductivity of PbSe thin films was found somewhat higher than that of general semiconductors.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.279.1-279.1
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• 2016

박막 트랜지스터 (thin film transistor, TFT)는 고밀도, 대면적화로 높은 전자의 이동도가 요구되면서, 비정질 실리콘 (a-Si)에서 다결정 실리콘 (poly-Si) TFT 로 연구되었다. 이에 따라 비정질 실리콘에서 결정질 실리콘으로의 상변화에 대한 결정화 연구가 활발히 진행되었다. 또한, 박막 태양전지 분야에서도 유리기판 위에 비정질 층을 증착한 후에 열처리를 통해 상변화하는 고상 결정화 (solid-phase crystallization, SPC) 기술을 적용하여, CSG (thin-film crystalline silicon on glass) 태양전지를 보고하였다. 이러한 비정질 실리콘 층의 결정화 기술을 결정질 실리콘 태양전지 에미터 형성 공정에 적용하고자 한다. 이 때, 플라즈마화학증착 (Plasma-enhanced chemical vapor deposition, PECVD) 장비로 증착된 비정질 실리콘 층의 열처리를 통한 결정화 정도가 중요한 요소이다. 따라서, 비정질 실리콘 층의 결정화에 영향을 주는 인자에 대해 연구하였다. 비정질 실리콘 증착 조건(H2 가스 비율, 도펀트 유무), 실리콘 기판의 결정방향, 열처리 온도에 따른 결정화 정도를 엘립소미터(elipsometer), 투과전자현미경 (transmission electron microscope, TEM), 적외선 분광기 (Fourier Transform Infrared, FT-IR) 측정을 통하여 비교 하였다. 이를 기반으로 결정화 온도에 따른 비정질 실리콘의 결정화를 위한 활성화 에너지를 계산하였다. 비정질 실리콘 증착 조건 보다 기판의 결정방향이 결정화 정도에 크게 영향을 미치는 것으로 확인하였다.