• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.85-91
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• 2008

A Boost Power Factor Correction (PFC) Converter employing Zero Voltage Switching (ZVS) based Compound Active Clamping (CAC) technique is presented in this paper. An Electro Magnetic Interference (EMI) Filer is connected at the line side of the proposed converter to suppress Electro Magnetic Interference. The proposed converter can effectively reduce the losses caused by diode reverse recovery. Both the main switch and the auxiliary switch can achieve soft switching i.e. ZVS under certain condition. The parasitic oscillation caused by the parasitic capacitance of the boost diode is eliminated. The voltage on the main switch, the auxiliary switch and the boost diode are clamped. The principle of operation, design and simulation results are presented here. A prototype of the proposed converter is built and tested for low input voltage i.e. 15V AC supply and the experimental results are obtained. The power factor at the line side of the converter and the converter efficiency are improved using the proposed technique.

• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1030-1033
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• 2002

This paper, a new simple controller operates in continuous conduction mode (CCM) for Boost power factor collection converter is introduced. The duty ratios are obtained by comparisons of a sensed signal from inductor current and a negative ramp carrier waveform in each switching period. By using the proposed controller, input voltage sensing, error amplifier in the current feedback loop, and analog multiplier／divider are not required, then, the control circuit implementation is very simple. To verify the proposed controller, the circuit simulation for Boost power factor correction converter was applied. For the results, the input current waveform was shaped to be closely sinusoidal, implying low THD.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 1999.11a
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• pp.273-278
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• 1999

This paper presents a novel Power Factor Corrected(PFC) single-stage AC/DC Half-Bridge converter, which features discontinuous conduction mode(DCM) and soft-switching. The reduced conduction losses are achieved by the employment of a novel power factor correction circuitry, instead of the conventional configuration composed of a front-end rectifier followed by a boost converter. To identify the validity of the proposed converter, simulated results of 500[W] converter with 100[V] input voltage and 50[V] output voltage are presented.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.281-286
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• 1998

This paper proposes a new single-stage, single-switch AC/DC converter based on the boost power factor correction (PFC) cell. The converter offers both high power factor and high efficiency. To reduce the dc voltage on the energy storage capacitor, the dc bus voltage feedback method was used. A 100W (5V/20A) prototype was built and tested to show the validity of the proposed converter.

• Proceedings of the KIPE Conference
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• 1998.07a
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• pp.31-34
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• 1998

In this paper, a Single-phase Active Rectifier(SAR) with high power factor capability for inverter air-conditioner is adopted for satisfying the international standards of input current harmonics, IEC 1000-3-2. Comparing the conventional boost power factor correction circuit, one diode drop is reduced in the power flow path of the SAR circuit, so the system efficiency is improved. To apply the control IC, such as UC3854, ML4821 and so forth, to the SAR, the adequate sensing circuits are proposed. The design rules of passive components and two control loops are also presented. The prototype SAR circuit with 3㎾ power consumption is builted and tested to verify the operation of the proposed circuit.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.252-257
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• 1998

Two-stage power factor correction (PFC) converter with a single PWM controller for universal input voltage (90-264V) is proposed. It consists of a power factor pre-regulator cascaded by a DC/DC converter as in a conventional two-stage approach. However, a single PWM controller is used as in a single-stage, single-switch PFC approach. The switch in the PFC part is synchronized with the switch in the DC/DC converter with a fixed switching frequency. Employing an adaptive delay scheme the switch in the PFC part is controlled to limit the energy storage capacitor voltage within a designed range for the optimum efficiency, and to reduce input current harmonic distortion. The experimental results obtained on a 200W (5V/40A) prototype PFC converter are given to verify the effectiveness of the proposed control method.

• International Journal of Aeronautical and Space Sciences
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• v.1 no.2
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• pp.9-16
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• 2000

For aerodynamic design of missile bodies of non-circular cross-section, the combination of the slender body theory and the cross-flow analogy can hardly be applied owing to the lack of experimental data. An alternative is to utilize the Euler solution in the design stage. For enhanced accuracy, however, an adequate viscous correction is necessary to the Euler solution. In this work, such a procedure is examined to compensate the viscous effect by utilizing the concept of proportionality factor in cross-flow analogy. Predictions of aerodynamic coefficients combining the Euler solution and the viscous correction via proportionality factor are made for a missile body of elliptic cross-section. Results indicate that the present approach can be adopted in designing missile bodies of non-circular cross-sections.

• Journal of the Korean Society of Safety
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• v.25 no.6
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• pp.161-168
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• 2010

A series of fatigue tests have been performed on the non-load carrying fillet welded joints in order to quantitatively assess the fatigue characteristics due to the grindings and TIG(Tungsten Inert Gas) welding treatments. From the results of fatigue tests, it has been shown that the fatigue strengths at $2{\times}106$ load cycles were improved in the case of the grinding sand TIG welding treatments, and we could know that it is satisfying fatigue strength prescribed in fatigue design standard in general. Besides, from the results of fracture mechanics approaches, the geometric shape correction factors were the most dominant factors in the initial fatigue crack growth, but as the fatigue crack develops, the finite plate correction factor were became the most dominant factor, and the fatigue life on non-load carrying fillet welded joints could be relatively exactly estimated by using the relations between fatigue crack growth rate and stress intensity factor obtained from finite element analysis and existing proposed formulae.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.248-253
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• 2014

Generally, power factor correction (PFC) techniques play an important role in the power supply technology. Many new circuit topologies and control strategies for PFC have been proposed. Among them, the brideless PFC (BPFC) reduces the number of switching devices and the losses and improves the power density as well. Moreover, by implementing the improved topology in the discontinous conduction mode (DCM) it ensures almost unity power factor in a simple and effective manner. In the DCM operation gives additional advantages such as zero-current turn-on in the power switches, zero-current turn-off in the output diode and reduces the complexity of the control circuitry. In this paper, a new control strategy for the BPFC is proposed. Also, the performance of the proposed system is demonstrated through experiments.

• Journal of Power Electronics
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• v.13 no.1
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• pp.40-50
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• 2013

In this paper, a new zero-voltage-switching, high power-factor, bridgeless rectifier is introduced. In this topology, an auxiliary circuit provides soft switching for all of the power semiconductor devices. Thus the switching losses are reduced and the highest efficiency can be achieved. The proposed converter has been analyzed and a design procedure has been introduced. The control circuit for the converter has also been developed. Based on the given approach, a 250 W, 400 Vdc prototype converters has been designed at 100 kHz for universal input voltage (90-264 Vrms) applications. A maximum efficiency of 94.6% and a power factor correction over 0.99 has been achieved. The simulation and experimental results confirm the design procedure and highlight the advantages of the proposed topology.