• Title/Summary/Keyword: computation time reduction

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Reduction of Structural and Computational Complexity in IMD Reduction Method of the PTS-based OFDM Communication System (PTS 방식의 OFDM 통신 시스템에서 IMD 저감 기법의 복잡도와 계산량 저감)

  • Kim, Seon-Ae;Lee, Il-Jin;Baek, Gwang-Hoon;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.8A
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    • pp.583-591
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    • 2009
  • OFDM(orthogonal frequency division multiplexing) signal with high PAPR(peak to average power ratio) produces the nonlinear distortion and/or decreases down the power efficiency of HPA(high power amplifier). So, the IMD(inter-modulation distortion) reduction method was proposed to reduce the nonlinear distortion, which shows better BER(bit error rate) performance than the PAPR reduction methods. However, IMD reduction method has inherent problem which system complexity and processing time increases because the FFT(fast Fourier transform) processor is added in transmitter and decision criterion of IMD reduction method is computed in frequency domain,. In this paper, therefore, we propose a new IMD reduction method to reduce the computational complexity and structure of IMD computation. And we apply this proposed method into OFDM system using PTS(partial transmit sequence) scheme and compare the computational complexity between conventional and proposed IMD reduction method. This method can reduce the system size and computational complexity. Also, the proposed has almost same BER performance with the conventional IMD reduction method.

An Efficient Application of XML Schema Matching Technique to Structural Calculation Document of Bridge (XML 스키마 매칭 기법의 교량 구조계산서 적용 방안)

  • Park, Sang Il;Kim, Bong-Geun;Lee, Sang-Ho
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.32 no.1D
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    • pp.51-59
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    • 2012
  • An efficient application method of XML schema matching technique to the document structure of structural calculation document (SCD) of bridge is proposed. With 30 case studies, a parametric study on weightings of name, sibling, child, and parent elements of XML scheme component that are used in the similarity measure of XML schema matching technique has been performed, and suitable weighting to analyze document structure of SCD is suggested. A simplified formula for quantification of similarity is also introduced to reduce computation time in huge scale document structure of SCDs. Numerical experiments show that the suggested method can increase the accuracy of XML schema matching by 10% with suitable weighting parameters, and can maintain almost the same accuracy without weighting parameters compared to previous studies. In addition, computation time can be reduced dramatically when the proposed simplified formula for the quantification of similarity is used. In the numerical experiments of testing 20 practical SCDs of bridges, the suggested method is superior to previous studies in the accuracy of analyzing document structure and 4 to 460 times faster than the previous results in computation time.

A novel hardware design for SIFT generation with reduced memory requirement

  • Kim, Eung Sup;Lee, Hyuk-Jae
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.2
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    • pp.157-169
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    • 2013
  • Scale Invariant Feature Transform (SIFT) generates image features widely used to match objects in different images. Previous work on hardware-based SIFT implementation requires excessive internal memory and hardware logic [1]. In this paper, a new hardware organization is proposed to implement SIFT with less memory and hardware cost than the previous work. To this end, a parallel Gaussian filter bank is adopted to eliminate the buffers that store intermediate results because parallel operations allow all intermediate results available at the same time. Furthermore, the processing order is changed from the raster-scan order to the block-by-block order so that the line buffer size storing the source image is also reduced. These techniques trade the reduction of memory size with a slight increase of the execution time and external memory bandwidth. As a result, the memory size is reduced by 94.4%. The proposed hardware for SIFT implementation includes the Descriptor generation block, which is omitted in the previous work [1]. The addition of the hardwired descriptor generation improves the computation speed by about 30 times when compared with the previous work.

Tag Identification Time Reduction Scheme of Back-End Server for Secure RFID Privacy Protection Protocol (안전한 RFID 프라이버시 보호 프로토콜을 위한 백엔드 서버의 태그 판별 시간 절감 기법)

  • Yeo Sang-Soo;Kim Soon-Seok;Kim Sung-Kwon
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.16 no.4
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    • pp.13-26
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    • 2006
  • RFID technology is evaluated as one of core technologies for ubiquitous environment, because of its various characteristics which barcode systems don't have. However, RFID systems have consumer's privacy infringement problems, such like information leakage and location tracing. We need RFID privacy protection protocols, that satisfy three essential security requirements; confidentiality, indistinguishability and forward security, in order to protect consumer's privacy perfectly. The most secure protocol, that satisfies all of the three essential security requirements, among existing protocols, is the hash-chain based protocol that Ohkubo proposed. Unfortunately this protocol has a big disadvantage that it takes very long time to identify a tag in the back-end server. In this paper, we propose a scheme to keep security just as it is and to reduce computation time for identifying a tag in back-end server. The proposed scheme shows the results that the identification time in back-end server is reduced considerably compared to the original scheme of Ohkubo protocol.

Direct Design Sensitivity Analysis of Frequency Response Function Using Krylov Subspace Based Model Order Reduction (Krylov 부공간 모델차수축소법을 이용한 주파수응답함수의 직접 설계민감도 해석)

  • Han, Jeong-Sam
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.23 no.2
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    • pp.153-163
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    • 2010
  • In this paper a frequency response analysis using Krylov subspace-based model reduction and its design sensitivity analysis with respect to design variables are presented. Since the frequency response and its design sensitivity information are necessary for a gradient-based optimization, problems of high computational cost and resource may occur in the case that frequency response of a large sized finite element model is involved in the optimization iterations. In the suggested method model order reduction of finite element models are used to calculate both frequency response and frequency response sensitivity, therefore one can maximize the speed of numerical computation for the frequency response and its design sensitivity. As numerical examples, a semi-monocoque shell and an array-type $4{\times}4$ MEMS resonator are adopted to show the accuracy and efficiency of the suggested approach in calculating the FRF and its design sensitivity. The frequency response sensitivity through the model reduction shows a great time reduction in numerical computation and a good agreement with that from the initial full finite element model.

A study on Improvement of the performance of Block Motion Estimation Using Neighboring Search Point (인접 탐색점을 이용한 블록 움직임 추정의 성능 향상을 위한 연구)

  • 김태주;진화훈;김용욱;허도근
    • Proceedings of the IEEK Conference
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    • 2000.06d
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    • pp.143-146
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    • 2000
  • Motion Estimation/compensation(ME/MC) is one of the efficient interframe ceding techniques for its ability to reduce the high redundancy between successive frames of an image sequence. Calculating the blocking matching takes most of the encoding time. In this paper a new fast block matching algorithm(BMA) is developed for motion estimation and for reduction of the computation time to search motion vectors. The feature of the new algorithm comes from the center-biased checking concept and the trend of pixel movements. At first, Motion Vector(MV) is searched in ${\pm}$1 of search area and then the motion estimation is exploited in the rest block. The ASP and MSE of the proposed search algorithm show good performance.

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유선 시뮬레이션 기법과 준해석해를 이용한 용질 거동 분석

  • 정대인;최종근;박광원
    • Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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    • 2004.04a
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    • pp.57-62
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    • 2004
  • Streamline simulation researches have been extensively accomplished due to the swiftness of computation and the reduction of numerical dispersion. In this study, we developed a streamline simulation model using a semianalytical solution of ID transport equation. To validate accuracy of the developed model, we compared simulation results of contaminant transport, which were acquired by streamline simulation models using an analytical solution, a numerical solution, and a semianalytical solution. The developed model using the semianalytical solution matched well with the model using an analytical solution. However, streamline simulation model using a numerical solution showed numerical dispersion. For an advection-dominant flow, there was little difference in the simulation results between the developed model and tile analytical model, but the differences between the analytical model and the numerical model were cleary shown. From the comparison of computing time we know that the streamline simulation using the semianalytical solution is 2-60 times as fast as the streamline simulation using the numerical solution.

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Network Reduction Method for Power System Transient Analysis ; Time-Domain Formulation Based On The Network Function (과도 상태 해석을 위한 계통 축약법 ; 계통 함수를 이용한 시간 영역 해석법)

  • Hong, J.H.;Kang, Y.C.;Cho, K.R.;Park, J.K.
    • Proceedings of the KIEE Conference
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    • 1991.07a
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    • pp.417-421
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    • 1991
  • In electromagnetic transient analysis, complex transmission system should be modelled in detail. But in large system, this full representation of power transmission system has a big burden in many sides such as computation time, modelling efforts, etc. It is very required, therefore, in electromagnetic transients studies to represent parts of a complete system in a reduced or an equivalent form. This paper develops the method from which system equivalents may be derived. The suggested method is of an essentially transient form, and allows travelling wave interaction between the equivalent and explicit transmission network to be modelled.

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A Study on The Coarse-to-fine Extraction Method of function Patterns by using The Dynamic Quantization of Parameter Space (매개변수공간의 동적 분할 방법에 의한 함수패턴의 단계적 분석 추출에 관한 연구)

  • 김민환;황희영
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.36 no.8
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    • pp.594-602
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    • 1987
  • This paper proposes a new method of reducing the processing time and the size of consummimg memories in Hough transform. In this method, only the functional patterns are considered. The candidate points which are accumulated into the parameter space are computed in a many-to-one fashion and the parameter space is quantized dynamically to maintain a fine precision where it is needed. And a coarse-to-fine extraction method is used to reduce the processing time. The many-to-one fashional computation results in a relatively high-densed accumulation of candidate points around the parameter points corresponding to the image patterns in the image space. So, the dynamic quantization procedure can be simplified and the local maxima can be determined easily. And more effective reduction can be obtained as the dimension of parameter space is increased.

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New Switching Strategy of PWM Inverter Controlled by Microprocessor (마이크로 프로세서로 제어되는 PWM 인버터의 새로운 스위칭 방식)

  • 이윤종;서기영;정동화
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.36 no.9
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    • pp.623-635
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    • 1987
  • A new suboptimal PWM is proposed, intended particularly for the reduction of acoustic noise and harmonics of the output current in the inverter-fed induction motor drive system. This strategy is based of the Regular PWM and applied optimal techniqe. And it could solve a problem that computation time is very much when switching strategy is determined at the Optimal PWM. In case that the number of switching increases infinitely, this strategy could determine the switching pattern, and can realize Online, Real time of microprocessor. Also, this strategy is applied to 1(Hp), three phase induction motor, and compared with the other PWMs. From the results, the validity of this strategy could be verified.

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