• Title/Summary/Keyword: complex baseband

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A CMOS Complex Filter with a New Automatic Tuning Method for PHS Application (PHS용 Automatic Tuning 방법을 이용한 Complex Filter)

  • Ko, Dong-Hyun;Park, Do-Jin;Jung, Sung-Kyu;Pu, Young-Gun;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.17-22
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    • 2007
  • This paper presents a baseband complex bandpass filter for PHS applications with a new automatic tuning method. The full-CMOS PHS transceiver is implemented by adopting the Low-IF architecture to overcome the DCoffset problems. To meet the Adjacent Channel Selectivity (ACS) performance, the 3rd-order Chebyshev complex bandpass filter is designed as the baseband channel-select filter. The new corner frequency tuning method is proposed to compensate the process variation. This method can reduce the noise level due to MOS switches. The filter was fabricated using a 0.35{\mu}m$ CMOS process, and the power consumption is 12mW.

Mathematical Modeling of VSB-Based Digital Television Systems

  • Kim, Hyoung-Nam;Lee, Yong-Tae;Kim, Seung-Won
    • ETRI Journal
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    • v.25 no.1
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    • pp.9-18
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    • 2003
  • We mathematically analyze the passband vestigial sideband (VSB) system for the Advanced Television Systems Committee (ATSC) digital television standard and present a baseband-equivalent VSB model. The obtained baseband VSB model is represented by convolution of the transmission signal (before modulation) and the baseband equivalent of the complex VSB channel. Due to the operation of the physical channel as an RF passband and the asymmetrical property of VSB modulation, it is necessary to use a complex model. However, the passband channel may be reduced to an equivalent baseband. We show how to apply standard channel model information such as delay, gain, and phase for multiple signal paths to compute both the channel frequency response with a given carrier frequency and the resulting demodulated impulse response. Simulation results illustrate that the baseband VSB model is equivalent to the passband VSB model.

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Complex Bandpass Sampling Technique and Its Generalized Formulae for SDR System (SDR 시스템을 위한 Complex Bandpass Sampling 기법 및 일반화 공식의 유도)

  • Bae, Jung-Hwa;Ha, Won;Park, Jin-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.7C
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    • pp.687-695
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    • 2005
  • A bandpass sampling technique, which is a method directly downconverting a bandpass signal to a baseband or a low IF signal without analog mixers, can be an alterative choice for the SDR system to minimize the RF front-end. In this paper, a complex bandpass sampling technique for two bandpass-filtered signals is proposed. We derived generalized formulae for the available sampling range, the signal's IF and the minimum sampling frequency taking into consideration the guard-bands for the multiple RE signals. Thru the simulation experiments, the advantages of the . complex bandpass sampling over the pre-reported real bandpass sampling are investigated for applications in the SDR design.

A Fully Synthesizable Bluetooth Baseband Module for a System-on-a-Chip

  • Chun, Ik-Jae;Kim, Bo-Gwan;Park, In-Cheol
    • ETRI Journal
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    • v.25 no.5
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    • pp.328-336
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    • 2003
  • Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

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Ka-band CMOS 2-Channel Image-Reject Receiver (Ka-대역 CMOS 2채널 이미지 제거 수신기)

  • Dongju Lee;Se-Hwan An;Ji-Han Joo;Jun-Beom Kwon;Younghoon Kim;Sanghun Lee
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.23 no.5
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    • pp.109-114
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    • 2023
  • In this paper, a 2-channel Image-Reject receiver using a 65-nm CMOS process is presented for Ka-band compact radars. The designed receiver consists of Low-Noise Amplifier (LNA), IQ mixer, and Analog Baseband (ABB). ABB includes a complex filter in order to suppress unwanted images, and the variable gain amplifiers (VGAs) in RF block and ABB have gain tuning range from 4.5-56 dB for wide dynamic range. The gain of the receiver is controlled by on-chip SPI controllers. The receiver has noise figure of <15 dB, OP1dB of >4 dBm, image rejection ratio of >30 dB, and channel isolation of >45 dB at the voltage gain of 36 dB, in the Ka-band target frequency. The receiver consumes 420 mA at 1.2 V supply with die area of 4000×1600 ㎛.

Programming Model for SODA-II: a Baseband Processor for Software Defined Radio Systems (SDR용 기저대역 프로세서를 위한 프로그래밍 모델)

  • Lee, Hyun-Seok;Yi, Joon-Hwan;Oh, Hyuk-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.7
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    • pp.78-86
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    • 2010
  • This paper discusses the programming model of SODA-II that is a baseband processor for software defined radio (SDR) systems. Signal processing On-Demand Architecture Ⅱ (SODA-II) is an on-chip multiprocessor architecture consisting of four processor cores and each core has both an wide SIMD datapath and a scalar datapath. This architecture is appropriate for baseband processing that is a mixture of vector computations and scalar computations. The programming model of the SODA-II is based on C library routines. Because the library routines hide the details of complex SIMD datapath control procedures, end users can easily program the SODA-II without deep understanding on its architecture. In this paper, we discuss the details of library routines and how these routines are exploited in the implementation of baseband signal processing algorithms. As application examples, we show the implementation result of W-CDMA multipath searcher and OFDM demodulator on the SODA-II.

A Low Complex and Low Power Baseband IR-UWB Transceiver for Wireless Sensor Network (무선 센서 네트워크 응용을 위한 초광대역 임펄스 통신용 저복잡도, 저전력 베이스밴드 트랜시버)

  • Lee, Soon-Woo;Park, Young-Jin;Kang, Ji-Myung;Kim, Young-Hwa;Kim, Kwan-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.45 no.7
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    • pp.38-44
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    • 2008
  • In this paper, we introduce an low complexity and low power IR-UWB (impulse radio ultra wideband) baseband transceiver for wireless sensor network. The proposed baseband, implemented by TSMC 0.18um CMOS technology, has a simple structure in which a simplified packet structure and a digital synchronizer with 1-bit sampler to detect incoming pulses are used. Besides, clock gating method using gated clock cell as well as customized clock domain division can reduce the total power consumption drastically. As a result, the proposed baseband has about 23K digital gates with an internal memory of 2Kbytes and achieves about 1.8mW@1Mbps power consumption.

A Fast A/D Converter using Digital Discriminators (Digital변별기를 이용한 고속A/D변환기)

  • 이병수;이종악
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.7 no.3
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    • pp.125-129
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    • 1982
  • Most A/D converters which encode baseband signals of several magahertz band width to accuracies such as 8 bits are complez and therefore expensive. This letter suggests that a simple fast digital encoder can be formed the combination of V.C.O. and digital discriminator, automatically elimnating the complex logic process of conventional fast baseband A/D converters. The techique is suitable for encoding video signals to 8bits.

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Doppler Radar System for Noncontact Bio-signal measurement (비접촉 방식의 생체 신호 측정을 위한 도플러 레이더 시스템)

  • Shin, Jae-Yeon;Cho, Sung-Pil;Jang, Byung-Jun;Park, Ho-Dong;Lee, Yun-Soo;Lee, Kyoung-Joung
    • Proceedings of the IEEK Conference
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    • 2009.05a
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    • pp.357-359
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    • 2009
  • In this paper, the 2.4GHz doppler radar system consisting of the doppler radar module and a baseband module were designed to detect heartbeat and respiration signal without direct skin contact. A bio-radar system emits continuous RF signal of 2.4GHz toward human chest, and then detects the reflected signal so as to investigate cardiopulmonary activities. The heartbeat and respiration signals acquired from quadrature signal of the doppler radar system are applied to the pre-processing circuit, amplification circuit, and the offset circuit of the baseband module. ECG(electrocardiogram) and reference respiration signals are measured simultaneously to evaluate the doppler radar system. As a result, the respiration signal of doppler radar signal is detected to 1m without complex digital signal processing. The sensitivity and calculated from I/Q respiration signal were $98.29{\pm}1.79%$, $97.11{\pm}2.75%$, respectively, and positive predictivity were $98.11{\pm}1.45%$, $92.21{\pm}10.92%$, respectively. The sensitivity and positive predictivity calculated from phase and magnitude of the doppler radar were $95.17{\pm}5.33%$, $94.99{\pm}5.43%$, respectively. In this paper, we confirmed that noncontact real-time heartbeat and respiration detection using the doppler radar system has the possibility and limitation.

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Design and Implement of Terrestrial & Satellite integrated DMB receiver for Personalized Broadcasting Services (개인 휴대형 방송 서비스를 위한 지상파/위성 통합 DMB 수신기 설계 및 구현)

  • Cho, Yong-Hoon;Kim, Won-Yong;Choi, Soon-Pil;Oh, Se-In;Choi, Jeong-Hoon
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.289-291
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    • 2007
  • The Digital Multimedia Broadcasting(DMB) system is developed to offer high quality audio-visual multimedia contents to the uses by the various portable terminals in the mobile environment. Integrated complex reception platform is required to receive multimedia broadcasting services transmitted from various transmission media. In this paper, we present the design and implementation technic for providing the both of terrestrial and satellite DMB services simultaneously using the same hardware platform. The implemented complex receiving terminal to accommodate these DMB services simultaneously need composed of it RF module. it baseband module, it complex control module and the complex de-multiplexer module. The complex control module is designed using uClinux operating system. The complex de-multiplexer, which perform the functions of the address decoder and each DMB stream de-multiplexer, is implemented. with FPGA device. The implemented platform is tested in a real environment and its performance is satisfied with required performance criteria.

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