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Programming Model for SODA-II: a Baseband Processor for Software Defined Radio Systems  

Lee, Hyun-Seok (Dept. of Electronics and Communications Engineering, Kwangwoon Univ.)
Yi, Joon-Hwan (Dept. of Computer Engieering, Kwangwoon Univ.)
Oh, Hyuk-Jun (Dept. of Electronics and Communications Engineering, Kwangwoon Univ.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.47, no.7, 2010 , pp. 78-86 More about this Journal
Abstract
This paper discusses the programming model of SODA-II that is a baseband processor for software defined radio (SDR) systems. Signal processing On-Demand Architecture Ⅱ (SODA-II) is an on-chip multiprocessor architecture consisting of four processor cores and each core has both an wide SIMD datapath and a scalar datapath. This architecture is appropriate for baseband processing that is a mixture of vector computations and scalar computations. The programming model of the SODA-II is based on C library routines. Because the library routines hide the details of complex SIMD datapath control procedures, end users can easily program the SODA-II without deep understanding on its architecture. In this paper, we discuss the details of library routines and how these routines are exploited in the implementation of baseband signal processing algorithms. As application examples, we show the implementation result of W-CDMA multipath searcher and OFDM demodulator on the SODA-II.
Keywords
Baseband Processor; Software Defined Radio(SDR); Low Power; Digital Signal Processing(DSP);
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  • Reference
1 H. Chang et. al., "Performance evaluation of an SIMD processor with a vector memory unit," SiPS 2006.
2 Dorit Naishlos, et. al., "Compiler Vectorization Techniques for a Disjoint SIMD Architecture," IBM Research Report H-0146, 2002.
3 T. Rappaport, "Wireless Communications: Principles and Practice," Prentice Hall, pp. 391, 2002.
4 H. Lee, et. al., "A Low Power DSP for Wireless Communications," IEEE Trans. Very Large Scale Integrated Systems, Accepted
5 H. Lee, "A Baseband Processor for Software Defined Radio Terminals," University of Michigan, Ann Arbor Ph.D Dissertation, 2007.
6 H. Chang et. al., "Performance evaluation of an SIMD processor with a vector memory unit," SiPS 2006.
7 H. Lee et al, "Software Defined Radio: A High Performance Embedded Challenge," HiPEAC 2006.