• 제목/요약/키워드: common source

검색결과 1,029건 처리시간 0.025초

Realization of Two-bit Operation by Bulk-biased Programming Technique in SONOS NOR Array with Common Source Lines

  • An, Ho-Myoung;Seo, Kwang-Yell;Kim, Joo-Yeon;Kim, Byung-Cheul
    • Transactions on Electrical and Electronic Materials
    • /
    • 제7권4호
    • /
    • pp.180-183
    • /
    • 2006
  • We report for the first time two-bit operational characteristics of a high-density NOR-type polysilicon-oxide-nitride-oxide-silicon (SONOS) array with common source line (CSL). An undesired disturbance, especially drain disturbance, in the NOR array with CSL comes from the two-bit-per-cell operation. To solve this problem, we propose an efficient bulk-biased programming technique. In this technique, a bulk bias is additionally applied to the substrate of memory cell for decreasing the electric field between nitride layer and drain region. The proposed programming technique shows free of drain disturbance characteristics. As a result, we have accomplished reliable two-bit SONOS array by employing the proposed programming technique.

A Model Predictive Control Method to Reduce Common-Mode Voltage for Voltage Source Inverters

  • Vu, Huu-Cong;Lee, Hong-Hee
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2015년도 추계학술대회 논문집
    • /
    • pp.209-210
    • /
    • 2015
  • This paper presents a new model predictive control method without the effect of a weighting factor in order to reduce common-mode voltage (CMV) for a three-phase voltage source inverter (VSI). By utilizing two active states with same dwell time during a sampling period instead of one state used in conventional method, the proposed method can reduce the CMV of VSI without the weighting factor. Simulation is carried out to verify the effectiveness of the proposed predictive control method with the aid of PSIM software.

  • PDF

Spring Boot 기반의 오픈소스 소프트웨어 보안 취약점 및 패치 정보 제공 웹 어플리케이션 개발 (Spring Boot-based Web Application Development for providing information on Security Vulnerabilities and Patches for Open Source Software)

  • 심완;최웅철
    • 디지털산업정보학회논문지
    • /
    • 제17권4호
    • /
    • pp.77-83
    • /
    • 2021
  • As Open Source Software(OSS) recently invigorates, many companies actively use the OSSes in their business software. With such OSS invigoration, our web application is developed in order to provide the safety in using the OSSes, and update the information on the new vulnerabilities and the patches at all times by crawling the web pages of the relevant OSS home pages and the managing organizations of the vulnerabilities. By providing the updated information, our application helps the OSS users and developers to be aware of such security issues, and gives them to work in the safer environment from security risks. In addition, our application can be used as a security platform to greatly contribute to preventing potential security incidents not only for companies but also for individual developers.

Reducing Common-Mode Voltage of Three-Phase VSIs using the Predictive Current Control Method based on Reference Voltage

  • Mun, Sung-ki;Kwak, Sangshin
    • Journal of Power Electronics
    • /
    • 제15권3호
    • /
    • pp.712-720
    • /
    • 2015
  • A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± Vdc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± Vdc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.

이중밴드 저잡음 증폭기 설계를 위한 공통 소스 접지형 CMOS 쌍의 잡음해석 (Noise Analysis of Common Source CMOS Pair for Dual-Band LNA)

  • 조민수;김태성;김병성
    • 한국전자파학회논문지
    • /
    • 제15권2호
    • /
    • pp.140-144
    • /
    • 2004
  • 직렬 공진형 공통 소스 접지 트랜지스터 쌍은 선택형 이중 밴드 LNA에 가장 널리 사용되는 구조이다. 본 논문은 이러한 선택형 이중밴드 저잡음 증폭기를 동시에 서로 다른 주파수에서 구동하였을 때 나타나는 잡음지수의 악화 정도를 해석하고, 0.18$\mu\textrm{m}$ CMOS 공정으로 구현한 LNA의 실험 결과와 비교한다. 아울러, 잡음 해석을 통해 다른 밴드 LNA로부터 발생하는 트랜지스터의 채널 잡음과 전원 잡음의 기여도를 분석하고, 동시형 LNA로 사용하였을 때 잡음을 최소화하기 위한 정합구조를 제안한다.

A Modified Single-Phase Transformerless Z-Source Photovoltaic Grid-Connected Inverter

  • Liu, Hongpeng;Liu, Guihua;Ran, Yan;Wang, Gaolin;Wang, Wei;Xu, Dianguo
    • Journal of Power Electronics
    • /
    • 제15권5호
    • /
    • pp.1217-1226
    • /
    • 2015
  • In a grid-connected photovoltaic (PV) system, the traditional Z-source inverter uses a low frequency transformer to ensure galvanic isolation between the grid and the PV system. In order to combine the advantages of both Z-source inverters and transformerless PV inverters, this paper presents a modified single-phase transformerless Z-source PV grid-connected inverter and a corresponding PWM strategy to eliminate the ground leakage current. By utilizing two reversed-biased diodes, the path for the leakage current is blocked during the shoot-through state. Meanwhile, by turning off an additional switch, the PV array is decoupled from the grid during the freewheeling state. In this paper, the operation principle, PWM strategy and common-mode (CM) characteristic of the modified transformerless Z-source inverter are illustrated. Furthermore, the influence of the junction capacitances of the power switches is analyzed in detail. The total losses of the main electrical components are evaluated and compared. Finally, a theoretical analysis is presented and corroborated by experimental results from a 1-kW laboratory prototype.

오픈소스 기반 분산원장기술 시스템을 위한 보안 강화 방안 (Security Enhancements for Distributed Ledger Technology Systems Based on Open Source)

  • 박근덕;김대경;염흥열
    • 정보보호학회논문지
    • /
    • 제29권4호
    • /
    • pp.919-943
    • /
    • 2019
  • 4차 산업 혁명 관련 신흥 기술로 주목받고 있는 분산원장기술은 오픈소스 기반 분산원장기술 시스템(또는 분산원장기술 플랫폼)으로 구현되어 다양한 애플리케이션(또는 서비스) 개발 시 널리 활용되고 있으나, 오픈소스 기반 분산원장기술 시스템에서 제공하는 보안 기능은 매우 미흡한 실정이다. 본 논문에서는 오픈소스 기반 분산원장기술 시스템 운용 시 발생할 수 있는 잠재적인 보안 위협을 식별하고, 국내 법규 및 보안 인증 기준(ISMS-P, Information Security Management System-Privacy)을 분석하여 보안 위협에 대응할 수 있는 보안기능 요구사항을 도출한다. 그리고 국제 표준인 공통평가기준(CC, Common Criteria)의 보안기능 컴포넌트 분석을 통하여 오픈소스 기반 분산원장기술 시스템에 필요한 보안 기능을 구현할 수 있는 방안을 제안함으로서 보안을 강화하고자 한다.

능동형 인덕터 Shuut Peaking을 이용한 0.25 μm CMOS TIA 설계 및 제작 (Design and Fabrication of 0.25 μm CMOS TIA Using Active Inductor Shunt Peaking)

  • 조인호;임영석
    • 한국전자파학회논문지
    • /
    • 제16권9호
    • /
    • pp.957-963
    • /
    • 2005
  • 본 논문에서는 TSMC 0.25 ${\mu}m$ CMOS RF-Mixed mode 공정 기술을 이용하여 초고속 광통신 시스템의 수신부에 사용되는 광대역 transimpedance amplifier를 설계하였다. 특히 광대역을 구성하기 위해 cascode와 common-source 구조에 active inductor shunt peaking을 이용하여 설계 및 제작하였으며, 측정 결과 gain 변화 없이 -3 dB 대역폭 특성이 cascode는 0.8 GHz에서 $81\%$ 증가한 1.45 GHz, common-source는 0.61 GHz에서 $48\%$ 증가한 0.9 GHz 결과가 나왔으며, 전체 파워 소비는 바이어스 2.5 V를 기준으로 37 mW와 45 mW이며, transimpedance gain은 61 dB$\Omega$과 61.4 dB$\Omega$을 얻을 수 있었다. 그리고 input noise current density도 상용 TIA와 거의 비슷한 $5 pA/\sqrt{Hz}$$4.5 pA/\sqrt{Hz}$를 가지며, out put Return loss는 전 대역에서 -10 dB 이하의 정합 특성을 보였다. 그리고 전체 chip 사이즈는 $1150{\times}940{\mu}m^2$이다.

New Strategy for Eliminating Zero-sequence Circulating Current between Parallel Operating Three-level NPC Voltage Source Inverters

  • Li, Kai;Dong, Zhenhua;Wang, Xiaodong;Peng, Chao;Deng, Fujin;Guerrero, Josep;Vasquez, Juan
    • Journal of Power Electronics
    • /
    • 제18권1호
    • /
    • pp.70-80
    • /
    • 2018
  • A novel strategy based on a zero common mode voltage pulse-width modulation (ZCMV-PWM) technique and zero-sequence circulating current (ZSCC) feedback control is proposed in this study to eliminate ZSCCs between three-level neutral point clamped (NPC) voltage source inverters, with common AC and DC buses, that are operating in parallel. First, an equivalent model of ZSCC in a three-phase three-level NPC inverter paralleled system is developed. Second, on the basis of the analysis of the excitation source of ZSCCs, i.e., the difference in common mode voltages (CMVs) between paralleled inverters, the ZCMV-PWM method is presented to reduce CMVs, and a simple electric circuit is adopted to control ZSCCs and neutral point potential. Finally, simulation and experiment are conducted to illustrate effectiveness of the proposed strategy. Results show that ZSCCs between paralleled inverters can be eliminated effectively under steady and dynamic states. Moreover, the proposed strategy exhibits the advantage of not requiring carrier synchronization. It can be utilized in inverters with different types of filter.

이중밴드 저잡음 증폭기 설계를 위한 공통 소스 접지형 CMOS쌍의 잡음해석 (Noise Analysis of Common Source CMOS Pair for Dual-Band LNA)

  • 조민수;김태성;김병성
    • 한국전자파학회:학술대회논문집
    • /
    • 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
    • /
    • pp.168-172
    • /
    • 2003
  • This paper analyzes the output noise and the noise figure of common source MOSFET pair each input of which is separately driven in the different frequencies. This analysis is performed for concurrent dual band cascode CMOS LNA with double inputs and single output fabricated in $0.18{\mu}m$ CMOS process. Since both inputs and output are matched to near $50{\Omega}$ using on-chip inductors, the measured noise figures are much higher than those of usual CMOS LNA. But, the main concern of this paper is focused on the added noise features due to the other channel common source stage. The dual-band LNA results in noise figure of 4.54dB at 2.14GHz and 6.03dB at 5.25GHz for selectable operation and 7.44dB and 6.58dB for concurrent operation. The noise analysis explains why the added noise at each band shows so large difference.

  • PDF