Transactions on Electrical and Electronic Materials

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Realization of Two-bit Operation by Bulk-biased Programming Technique in SONOS NOR Array with Common Source Lines

  • An, Ho-Myoung (Department of Electronic Materials Enginering, Kwangwoon University) ;
  • Seo, Kwang-Yell (Department of Electronic Materials Enginering, Kwangwoon University) ;
  • Kim, Joo-Yeon (School of Electrical Engineering, Ulsan College) ;
  • Kim, Byung-Cheul (Department of Electronic Engineering, Jinju National University)
  • Published : 2006.08.01
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Abstract

We report for the first time two-bit operational characteristics of a high-density NOR-type polysilicon-oxide-nitride-oxide-silicon (SONOS) array with common source line (CSL). An undesired disturbance, especially drain disturbance, in the NOR array with CSL comes from the two-bit-per-cell operation. To solve this problem, we propose an efficient bulk-biased programming technique. In this technique, a bulk bias is additionally applied to the substrate of memory cell for decreasing the electric field between nitride layer and drain region. The proposed programming technique shows free of drain disturbance characteristics. As a result, we have accomplished reliable two-bit SONOS array by employing the proposed programming technique.

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References

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  1. The Characteristics of p-channel SONOS Transistor for the NAND Charge-trap Flash Memory vol.22, pp.1, 2009, https://doi.org/10.4313/JKEM.2009.22.1.007