• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.140-148
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• 2013

This paper presents a iterative Bose-Chaudhuri-hocquenghem (i-BCH) code and its high-speed decoder architecture for 100 Gb/s optical communications. The proposed architecture features a very high data processing rate as well as excellent error correction capability. The proposed 6-iteration i-BCH code structure with interleaving method allows the decoder to achieve 9.34 dB net coding gain performance at $10^{-15}$ decoder output bit error rate to compensate for serious transmission quality degradation. The proposed high-speed i-BCH decoder architecture is synthesized using a 90-nm CMOS technology. It can operate at a clock frequency of 430 MHz and achieve a data processing rate of 100 Gb/s. Thus, it has potential applications in next generation forward error correction (FEC) schemes for 100 Gb/s optical communications.

• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.171-180
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• 2002

The effective and accurate data flow problem analysis uses the dominator tree and DJ graphs. The data flow problem solving is to safely reduce the flow graph to the dominator tree. The flow graph replaces a parse tree and used to accurately reduce either reducible or irreducible flow graph to the dominator tree. In this paper, in order to utilize Tarian's path compress algorithm, the Top node finding algorithm is suggested and the existing delay reduction algorithm is improved using Path compression. The delayed reduction a1gorithm using path compression actually compresses the pathway of the dominator tree by hoisting the node while reducing to delay the DJ graph. Realty, the suggested algorithm had hoisted nodes in 22% and had compressed path in 20%. The compressed dominator tree makes it possible to analyze the effective data flow analysis and brings the improved effect for the complexity of code optimization process with the node hoisting effect of code optimization process.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.1
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• pp.1-11
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• 2000

We propose a predistorter to compensate for nolinear distortion induced by a high power amplifier employed in multi carrier-code division multiple access (MC-CDMA) systems. The proposed scheme rests upon the fixed point iteration (FPI) associated with the contraction mapping theorem. Unlike the predistorter based on the FPI already presented by the authors in other literatures which operates on complex-valued modulation signals, the proposed predistorter in this paper deals with real-valued FPI on modulation signal amplitudes, resulting in less complexity. Simulation results on a BPSK-modulated, 64-subcarrier synchronous MC-CDMA baseband system with a traveling wave tube amplifier in the transmitter, indicate that the proposed predistorter achieves significant improvement in terms of bit error rate and total degradation over those without the predistorter. Moreover, the proposed predistorter outperforms the complex-valued counterpart, in particular, for small output back-off levels.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.48-58
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• 2016

This paper presents the high-throughput fully-parallel architecture for GF(64) (160,80) regular (2,4) non-binary LDPC (NB-LDPC) codes decoder based on the extended min sum algorithm. We exploit the NB-LDPC code that features a very low check node and variable node degree to reduce the complexity of decoder. This paper designs the fully-parallel architecture and allows the interleaving check node and variable node to increase the throughput of the decoder. We further improve the throughput by the proposed early sorting to reduce the latency of the check node operation. The proposed decoder has the latency of 37 cycles in the one decoding iteration and achieves a high throughput of 1402Mbps at 625MHz.

• Journal of KIISE:Software and Applications
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• v.36 no.7
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• pp.523-530
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• 2009

Despite the growing need for customized operating system kernels for embedded devices, kernel development continues to suffer from insufficient reliability and high testing cost for several reasons such as the high complexity of the kernel code. To alleviate these difficulties, this study proposes the MOdel-based KERnel Testing (MOKERT) framework for detection of concurrency bugs in the kernel. MOKERT translates a given C program into a corresponding Promela model, and then tries to find a counter example with regard to a given requirement property, If found, MOKERT executes that counter example on the real kernel code to check whether the counter example is a false alarm or not, The MOKERT framework was applied to the Linux proc file system and confirmed that the bug reported in a ChangeLog actually caused a data race problem, In addition, a new data race bug in the Linux proc file system was found, which causes kernel panic.

• KIISE Transactions on Computing Practices
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• v.22 no.12
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• pp.632-645
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• 2016

The enterprise environment, various interface systems are utilized for business processes and for exchange of messages. In the interface communication environment, as business complexity increases, the interface system is connected with numerous systems. With increasing number of linked systems, there is a proportional increase in the workforce, leading to a rise in numerous risks (inconsistency of information, non-compliance with standards, etc.). To solve the problem, we propose a system for managing and centralizing information of the message based interface system. The proposed system enables information integration management, message information distribution, standard code generation, risk management and risk evasion. Using the proposed system, the in development environment user can prevent inconsistent information, analyze risk, avoid risk, distribute information automatically and create a standard code. Ultimately, there is an increase in user productivity and it is possible to evade the risks involved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.496-502
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• 2006

The complexity of IC has rapidly increased as VLSI fabrication technology has grown up quickly. This paper proposes verification methods for data conflicts and protocol between IPs for SoC with coverage metrics. The high-level events is defined to cooperation between blocks or process statement in HDL, or a sequence of performing a job compared to low-level event. They are classified into two categories, resource conflicts and protocol or specification-dependent conflicts. And two coverage metrics used for code coverage in low-level event are proposed to verify the hish-level events. The events of resource conflicts can be detected by using statement coverage metric if global signal or variable has flags in a testbench program, and protocol-dependent events can be checked by data flow metric or path metric.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.229-232
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• 2012

This paper describes performance evaluation using fixed-point Matlab modeling and simulation, and hardware design of LDPC decoder which is based on Improved Normalized Min-Sum(INMS) decoding algorithm. The designed LDPC decoder supports 19 block lengths(576~2304) and 6 code rates(1/2, 2/3A, 2/3B, 3/4A, 3/4B, 5/6) of IEEE 802.16e mobile WiMAX standard. Considering hardware complexity, it is designed using a block-serial(partially parallel) architecture which is based on layered decoding scheme. A DFU based on sign-magnitude arithmetic is adopted to minimize hardware area. Hardware design is optimized by using INMS decoding algorithm whose performance is better than min-sum algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12B
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• pp.1677-1685
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• 2001

In this paper, we propose a call admission control scheme that can be performed within guaranteeing of required QoS(Quality of Services) in DS-CDMA(Direct Sequence-Code Division Multiple Access) reverse link. It has been performed rely on a physical channel numberonly and based on quality of received signal from MODEM(modulator/demodulator) part in established study. In other methods, the standard for services would have been set from statistical analysis of users\` location and using received power level in BTS(Base Transceiver Station). These ways bring about not only system loads but time delay or great differences from real environment. To solve these problems, we propose a call drop rate estimation algorithm for the purpose of call admission control based on measured value at LNA(Low Noise Amplifier) ports of BTS(Base Transceiver Station) in real time. This method proposed in this paper estimates a quality of offered service in real time, reduce system loads and shorten time delay which is needed to determine the standard for call admission control. But it requires a additional 17W complexity which can measure received signal power in BTS and estimate call drop rate.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.1C
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• pp.81-89
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• 2003

For improving the performance of noise suppression in tactical communication environments, an enhanced MELP vocoder is suggested, in which an acoustic noise suppressor is integrated into the front end of the MELP algorithm, and an FEC code into the channel side of the MELP algorithm. The acoustic noise suppressor is the modified IS-127 EVRC noise suppressor which is adapted for the MELP vocoder. As for FEC, the turbo code, which consists of rate-113 encoding and BCJR-MAP decoding algorithm, is utilized. In acoustic noise environments, the lower the SNR becomes, the more the effects of noise suppression is increased. Moreover, The suggested system has greater noise suppression effects in stationary noise than in non-stationary noise, and shows its superiority by 0.24 in MOS test to the original MELP vocoder. When the interleave size is one MELP frame, BER 10-6 is accomplished at channel bit SNR 4.2 ㏈. The iteration of decoding at 3 times is suboptimal in its complexity vs. performance. Synthetic quality is realized as more than MOS 2.5 at channel bit SNR 2 ㏈ in subjective voice quality test, when the interleave size is one MELP frame and the iteration of decoding is more than 3 times.