• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.141-144
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• 2002

Several charge Injection compensation circuits, such as, the dummy transistor circuit, the switched OP-amp circuit, the switched capacitor circuit, were fabricated and the test results were compared. The differences between SPICE simulation results and measurements were within around 10%.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.325-327
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• 1995

A new gate drive circuit of classic converter for a switched reluctance motor is presented. Conventional gate drive circuit usually consists of the isolated power supplies and signal transferring devices for isolation, such as photo coupler, pulse transformer, and gate drive chips. The proposed gate drive circuit consists of resistors, capacitors, and zenor diodes without isolated power supplies, that make the drive circuit simple and reduce the material cost. The operational modes are classified and analyzed. The characteristics of the phase current and the gate signal of upper switches is investigated with the variation of duty ratio through the experiments.

• ETRI Journal
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• v.31 no.2
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• pp.111-120
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• 2009

Network-on-chip (NoC) architecture provides a highper-formance communication infrastructure for system-on-chip designs. Circuit-switched networks guarantee transmission latency and throughput; hence, they are suitable for NoC architecture with real-time traffic. In this paper, we propose an efficient integrated scheme which automatically maps application tasks onto NoC tiles, establishes communication circuits, and allocates a proper bandwidth for each circuit. Simulation results show that the average waiting times of packets in a switch in $6{\times}6$6, $8{\times}8$, and $10{\times}10$ mesh NoC networks are 0.59, 0.62, and 0.61, respectively. The latency of circuits is significantly decreased. Furthermore, the buffer of a switch in NoC only needs to accommodate the data of one time slot. The cost of the switch in the circuit-switched network can be reduced using our scheme. Our design provides an effective solution for a critical step in NoC design.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.5
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• pp.458-465
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• 2013

This paper proposes a novel soft-switched auxiliary resonant circuit to provide a Zero-Voltage-Transition at turn-on for a conventional PWM boost converter in a PFC application. The proposed auxiliary circuit enables a main switch of the boost converter to turn on under a zero voltage switching condition and simultaneously achieves both soft-switched turn-on and turn-off. Moreover, for the purpose of an intelligent multi-chip power module fabrication, the proposed circuit is designed to satisfy several design constraints including space saving, low cost, and easy fabrication. As a result, the circuit is easily realized by a low rated MOSFET and a small inductor. Detail operation and the circuit waveform are theoretically explained and then simulation and experimental results are provided based on a 1.8 kW prototype PFC converter in order to verify the effectiveness of the proposed circuit.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.4
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• pp.137-142
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• 2023

When designing a SMPS(Switched Mode Power Supply) circuit, a part that is easily overlooked without special consideration is a snubber circuit. However, the performance degradation of the SMPS due to the snubber circuit and the effect on the entire SET cannot be ignored. In addition, a snubber circuit is added to both ends of the switch to protect the device from peak voltage and current during switching and to reduce loss during on/off switching. Therefore, in this paper, for a sufficient understanding of snubber circuits, theoretical analysis and experimental formulas that can be applied by designers during actual circuit design are arranged to promote optimization of snubber circuits.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.5B no.3
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• pp.267-271
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• 2005

This paper deals with two kinds of novel shape switched reluctance motors (SRM) with magnetic barriers in order to improve operating performances of prototype. The magnetic barriers make rotor poles more saturated, and consequently inductance profiles are distorted. The changed inductance affects input current shape and eventually torque characteristics. In order to analyze the complicated flux pattern of the SRM with magnetic barriers and its terminal characteristics simultaneously, coupled field circuit modeling method is used. The finite element method is used to model the nonlinear magnetic field, and coupled to the circuit model of the SRM overall system. After experimental results are presented to prove the accuracy of the method, the several analysis results are compared, and the improved rotor shape is presented.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.15-18
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• 1998

Most existing FRADs support only permanent virtual circuit-based frame relay services. But several applications such as intranets, desktop video conferencing, remote access and voice applications typically do not require the dedicated bandwidth capabilities of PVCs because connections are only occasionally needed. So it drives the need of switched virtual circuit-based FRADs which offer potentail cost savings associated with dynamic bandwidth on demand connectivity. In this paper, we describe Frame Relay Network Access System(FNAS) that provides switched virtual circuit-based frame relay access for dial-up Internet services. The hardware configuration, software architecture and call processing flow of FNAS is explained.

• 한국정보통신설비학회:학술대회논문집
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• 2007.08a
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• pp.264-268
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• 2007

This article presents the performance evaluation case study of circuit-switched WCDMA R5MSC(Mobile Switching Center) Server and CS-MGW(Circuit Switched Media Gateway) in 3'rd generation mobile telecommunication (UMTS : Universal Mobile Telecommunication System). The presented work adopted circuit switching scenarios recommended by 3GPP(Third Generation Partnership Project) and terrestrial spectrum calculation parameters and its values defined in ITU-R M.2023 and M.1390 to do the case study on performance evaluation of circuit switched system (R5 MSC Server and CS-MGW) in WCDMA core network. This paper describes test results by using simulator which substitutes for wireless section (MS, Node-B, RNC).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.318-327
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• 2010

This paper deals with analysis on dynamic characteristic and circuit parameter of linear switched reluctance motor by electromagnetic analytical method. Above all, using space harmonic method, which is electromagnetic method, the air-gap flux density is analyzed in the both align and unaign positions, and the inductance profile, force characteristic and resistance per phase are calculated by means of the process. The validity of the analyzed results are demonstrated by the finite element method(FEM) and manufacture of the prototype machine. Second, the dynamic simulation is analyzed by the use of circuit parameters derived from analytical method, and the operating system of the prototype machine is manufactured to demonstrated the validity of simulation analysis. As a result, it is considered that the characteristic equation suggested in this paper will contribute to the design, analysis and application of LSRM.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.