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Dynamic-Response-Free SMPS Using a New High-Resolution DPWM Generator Based on Switched-Capacitor Delay Technique  

Lim, Ji-Hoon (School of Electronics Engineering, Soongsil University)
Park, Young-Kyun (School of Electronics Engineering, Soongsil University)
Wee, Jae-Kyung (School of Electronics Engineering, Soongsil University)
Song, In-Chae (School of Electronics Engineering, Soongsil University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.49, no.1, 2012 , pp. 15-24 More about this Journal
Abstract
In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.
Keywords
SMPS; DPWM; Dynamic-Response-Free; Switched-Capacitor; High-Efficiency; Low-Power;
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