• IEIE Transactions on Smart Processing and Computing
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• 제5권2호
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• pp.143-151
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• 2016

This paper presents new prediction methods to improve compression performance of the so-called near-lossless RGB-domain image coder, which is designed to effectively decrease the memory bandwidth of a system-on-chip (SoC) for image processing. First, variable block size (VBS)-based intra prediction is employed to eliminate spatial redundancy for the green (G) component of an input image on a pixel-line basis. Second, inter-color prediction (ICP) using spectral correlation is performed to predict the R and B components from the previously reconstructed G-component image. Experimental results show that the proposed algorithm improves coding efficiency by up to 30% compared with an existing algorithm for natural images, and improves coding efficiency with low computational cost by about 50% for computer graphics (CG) images.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.224-227
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• 1999

This paper presents a design of the real-time preprocessor for CMOS image sensor suitable to the digital camera applications. CMOS image sensor offers some advantages in on-chip integration, system power reduction, and low cost. However, it has a lower-quality image than CCDs. We describe an image enhancement algorithm, which includes color interpolation, color correction, gamma correction, sharpening, and automatic exposure control, to compensate for this disadvantage, and present its efficient hardware architecture to implement on the real-time processor. The presented real-time preprocessor was designed using VHDL, and it contains about 19.2K logic gates. We also implement our system on FPGA chips in order to provide the real-time adjustment and it was successfully tested.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.727-731
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• 2005

Design and manufacturing process of a full color LED microdislay fabricated by standard CMOS technology and containing an array of aluminum / nanostructured porous silicon reverse biased light emitting Schottky diodes will be discussed. Being of a solid state construction, this microdisplays are cost-effective, thin and light in weight due to very simple device architecture. Its benefits include also super high resolution, wide viewing angles, fast response time and wide operating temperature range. The advantages of full integration of an LED-array and driving circuitry onto a Si-chip will be also discussed.

• Current Optics and Photonics
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• 제4권5호
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• pp.428-433
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• 2020

Recently, the on-chip autofocus (AF) function has become essential to the CMOS image sensor. An auto-focus usually operates using phase detection of the photocurrent difference from a pair of AF pixels that have focused or defocused. However, the phase-detection method requires a pair of AF pixels for comparison of readout. Therefore, the pixel variation may reduce AF performance. In this paper, we propose a color-selective AF pixel with a plasmonic nanostructure in a 0.9 μ㎡ pixel. The suggested AF pixel requires one pixel for AF function. The plasmonic nanostructure uses metal-insulator-metal (MIM) stack arrays instead of a color filter (CF). The color filters are formed at the subwavelength, and they transmit the specific wavelength of light according to the stack period and incident angles. For the optical analysis of the pixel, a finite-difference time-domain (FDTD) simulation was conducted. The analysis showed that the MIM stack arrays in the pixels perform as an AF pixel. As the primary metric of AF performance, the resulting AF contrasts are 1.8 for the red pixels, 1.6 for green, and 1.5 blue. Based on the simulation results, we confirmed the autofocusing performance of the MIM stack arrays.

• Current Optics and Photonics
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• 제7권5호
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• pp.485-495
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• 2023

The pixel size in high-resolution complementary metal-oxide-semiconductor (CMOS) image sensors continues to shrink due to chip size limitations. However, the pixel pitch's miniaturization causes deterioration of optical performance. As one solution, a quad color filter (CF) array with pixel binning has been developed to enhance sensitivity. For high sensitivity, the microlens structure also needs to be optimized as the CF arrays change. In this paper, the covered microlens, which consist of four microlenses covered by one large microlens, are proposed for the quad CF array in the backside illumination pixel structure. To evaluate the optical performance, the suggested microlens structure was simulated from 0.5 ㎛ to 1.0 ㎛ pixels at the center and edge of the sensors. Moreover, all pixel structures were compared with and without in-pixel deep trench isolation (DTI), which works to distribute incident light uniformly into each photodiode. The suggested structure was evaluated with an optical simulation using the finite-difference time-domain method for numerical analysis of the optical characteristics. Compared to the conventional microlens, the suggested microlens show 29.1% and 33.9% maximum enhancement of sensitivity at the center and edge of the sensor, respectively. Therefore, the covered microlens demonstrated the highly sensitive image sensor with a quad CF array.

• 한국광학회지
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• 제25권5호
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• pp.254-261
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• 2014

본 논문에서는 일반적인 코팅형 형광체와 이격 형광체 등 두 가지의 형광체 구조가 적용된 백색 LED를 제작한 후 온도변화에 따라 각 백색 LED의 발광 특성이 어떻게 변하는지 측정, 비교하였다. 상온에서 80oC 사이의 구간에서 측정된 두 백색 LED의 발광 스펙트럼을 분석하기 위해 Gaussian Lorentz-cross product 함수와 Asymmectic double sigmoidal 함수를 각각 청색 피크와 황색 피크의 곡선맞춤에 활용하였다. 이로부터 각 피크의 중심파장과 진폭, 반치폭 및 비대칭성을 온도의 함수로 구할 수 있었다. 온도에 따른 휘도와 색좌표를 측정한 결과 이격형광체 구조의 백색 LED의 온도에 따른 휘도저하율 및 색좌표 변화율이 훨씬 적었다. 이는 청색 LED 칩과 형광체가 분리됨에 따라 형광체의 온도가 일반 형광체 도포형 LED의 경우에 비해 낮아져서 효율이 상승했고 아울러 형광체에서 발생한 빛의 칩에 의한 흡수가 감소했기 때문인 것으로 해석된다.

• 대한전자공학회논문지SD
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• 제46권1호
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• pp.98-106
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• 2009

본 논문에서는 ultra mobile PC (UMPC) 및 휴대용 기기 시스템 같이 고속으로 동작하며 고해상도 저전력 및 소면적을 동시에 요구하는 16M-color low temperature Poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) 응용을 위한 1:12 MUX 기반의 1280-RGB $\times$ 800-Dot 70.78mW 0.13um CMOS LCD driver IC (LDI) 를 제안한다. 제안하는 LDI는 저항 열 구조를 사용하여 고해상도에서 전력 소모 및 면적을 최적화하였으며 column driver는 LDI 전체 면적을 최소화하기 위해 하나의 column driver가 12개의 채널을 구동하는 1:12 MUX 구조로 설계하였다. 또한 신호전압이 rail-to-rail로 동작하는 조건에서 높은 전압 이득과 낮은 소비전력을 얻기 위해 class-AB 증폭기 구조를 사용하였으며 고화질을 구현하기 위해 오프 셋과 출력편차의 영향을 최소화하였다 한편, 최소한의 MOS 트랜지스터 소자로 구현된 온도 및 전원전압에 독립적인 기준 전류 발생기를 제안하였으며, 저전력 설계를 위하여 차세대 시제품 칩의 source driver에 적용 가능한 새로운 구조의 slew enhancement기법을 추가적으로 제안하였다. 제안하는 시제품 LDI는 0.13um CMOS 공정으로 제작되었으며, 측정된 source driver 출력 정착 시간은 high에서 low 및 low에서 high 각각 1.016us, 1.072us의 수준을 보이며, source driver출력 전압 편차는 최대 11mV를 보인다. 시제품 LDI의 칩 면적은 $12,203um{\times}1500um$이며 전력 소모는 1.5V/5.5V 전원 저압에서 70.78mW이다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.628-632
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• 2003

An intelligent miniature humanoid robot system is designed and implemented as a platform for researching walking algorithm. The robot system consists of a mechanical robot body, a control system, a sensor system, and a human interface system. The robot has 6 dofs per leg, 3 dofs per arm, and 2 dofs for a neck, so it has total of 20 dofs to have dexterous motion capability. For the control system, a supervisory controller runs on a remote host computer to plan high level robot actions based on the vision sensor data, a main controller implemented with a DSP chip generates walking trajectories for the robot to perform the commanded action, and an auxiliary controller implemented with an FPGA chip controls 20 actuators. The robot has three types of sensors. A two-axis acceleration sensor and eight force sensing resistors for acquiring information on walking status of the robot, and a color CCD camera for acquiring information on the surroundings. As an example of an intelligent robot action, some experiments on playing soccer are performed.

• 실천공학교육논문지
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• 제6권2호
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• pp.91-97
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• 2014

FPGA를 이용해서 다양한 멀티미디어 데이터 처리가 가능한 교육장비를 소개한다. 이 장비를 이용해서 영상인식 기반의 하드웨어 설계의 한 사례를 소개하고 그 설계를 기반으로 "FPGA를 이용한 디지털시스템 설계" 교과목의 교육 가능한 사례를 소개한다. 학생들에 의해서 새롭게 설계한 하드웨어를 본 FPGA를 이용해서 하드웨어 장비에 적용시키는 능력을 배양할 수 있고, 또한 개념 설계, 부분설계, 상세설계를 통해서 FPGA 기반 하드웨어의 창의적 종합설계 능력을 키울 수 있다. 그리고 오디오 코덱을 제어하는 부분은 FPGA내에 있는 소프트 마이크로프로세서인 NIOS II를 이용해서 한 칩에 디지털 하드웨어와 마이크로컨트롤러를 결합한 SOC 설계 능력을 키울 수 있다. 또한, 무선통신, Labivew와 FPGA 설계 능력을 결합하는 적용능력도 키울 수 있다.

• BioChip Journal
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• 제12권4호
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• pp.326-331
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• 2018

Contamination by pesticides is an everincreasing problem associated with fields of environmental management and healthcare. Accordingly, appropriate treatments are in demand. Pesticide detection methods have been researched extensively, aimed at making the detection convenient, fast, cost-effective, and easy to use. Among the various detecting strategies, paper-based assay is potent for real-time pesticide sensing due to its unique advantages including disposability, light weight, and low cost. In this study, a paper-based sensor for chlorpyrifos, an organophosphate pesticide, has been developed by layering three sheets of patterned plates. In colorimetric quantification of pesticides, the blue color produced by the interaction between acetylcholinesterase and indoxyl acetate is inhibited by the pesticide molecules present in the sample solutions. With the optimized paper-based sensor, the pesticide is sensitively detected (limit of detection =8.60 ppm) within 5min. Furthermore, the shelf life of the device is enhanced to 14 days after from the fabrication, by treating trehalose solution onto the deposited reagents. We expect the paper-based device to be utilized as a first-screening analytic device for water quality monitoring and food analysis.