• Title/Summary/Keyword: charge center

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The Study of the Charge Transport on the Surface Layer of the Patterned Vertical Alignment(PVA) Mode

  • Choi, Nak-Cho;You, Jae-Yong;Jung, Ji-Young;Rhie, Kung-Won;Shin, Sung-Tae
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.571-573
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    • 2007
  • It is known that the main source of the area image sticking is the ion charge adsorption on the alignment layer. We found out that the adsorption of the ion charge of the liquid crystal in the cell was physisorption, which takes place between all molecules on any surface providing the adsorption force is small.

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In Situ X-ray Absorption Spectroscopic Study for α-MoO3 Electrode upon Discharge/Charge Reaction in Lithium Secondary Batteries

  • Kang, Joo-Hee;Paek, Seung-Min;Choy, Jin-Ho
    • Bulletin of the Korean Chemical Society
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    • v.31 no.12
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    • pp.3675-3678
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    • 2010
  • In-situ X-ray absorption spectroscopy (XAS) was used to elucidate the structural variation of $\alpha-MoO_3$ electrode upon discharge/charge reaction in a lithium ion battery. According to the XAS analysis, hexavalent Mo atoms in $\alpha-MoO_3$ framework are reduced as the amount of intercalated lithium ions increases. As lithium de-intercalation proceeds, most of pre-edge peaks are restored again. However, according to the Fourier transforms of the extended X-ray absorption fine structure (EXAFS) spectra, lithium de-intercalation reaction is partially irreversible upon the charge reaction, which is one of the main reasons why the capacity of $\alpha-MoO_3$ electrode decreases upon successive discharge/charge cycles.

Enhancement of Quick-Charge Performance by Fluoroethylene Carbonate additive from the Mitigation of Electrode Fatigue During Normal C-rate Cycling

  • Tae Hyeon Kim;Sang Hyeong Kim;Sung Su Park;Min Su Kang;Sung Soo Kim;Hyun-seung Kim;Goojin Jeong
    • Journal of Electrochemical Science and Technology
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    • v.14 no.4
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    • pp.369-376
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    • 2023
  • The quick-charging performance of SiO electrodes is evaluated with a focus on solid electrolyte interphase (SEI)-reinforcing effects. The study reveals that the incorporation of fluoroethylene carbonate (FEC) into the SiO electrode significantly reduced the electrode fatigue, which is from the the viscoelastic properties of the FEC-derived SEI film. The impact of FEC is attributed to its ability to minimize the mechanical failure of the electrode caused by additional electrolyte decomposition. This beneficial outcome arises from volumetric stain-tolerant characteristics of the FEC-derived SEI film, which limited exposure of the bare SiO surface during 0.5 C-rate cycling. Notably, FEC greatly improves Li deposition during quick-charge cycles following aging at 0.5 C-rate cycling due to its ability to maintain a strong electrical connection between active materials and the current collector, even after extended cycling. Given these findings, we assert that mitigating SEI layer deterioration, which compromises the electrode structure, is vital. Hence, enhancing the interfacial attributes of the SiO electrode becomes crucial for maintaining kinetic efficiency of battery system.

A Study on The Distribution of Surface Charge Density on Polymer Insulators (고분자애자의 표면전하밀도 분포에 관한 연구)

  • Yang, J.J.;Hwang, B.M.;Kim, K.S.;Lee, J.H.
    • Proceedings of the KIEE Conference
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    • 1997.11a
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    • pp.354-356
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    • 1997
  • In this paper, we study the distribution of surface charge density on polymer insulators. The electric field of polymer insulators is calculated by axisymetric 3-D FEM with dc source. And the surface charge density is calculated by electric scalar potential and boundary condition for electrostatic fields. Simulation model is the inclined type polymer insulator with a shed.

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Statistical Characterization Fabricated Charge-up Damage Sensor

  • Samukawa Seiji;Hong, Sang-Jeen
    • Transactions on Electrical and Electronic Materials
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    • v.6 no.3
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    • pp.87-90
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    • 2005
  • $SiO_2$ via-hole etching with a high aspect ratio is a key process in fabricating ULSI devices; however, accumulated charge during plasma etching can cause etching stop, micro-loading effects, and charge build-up damage. To alleviate this concern, charge-up damage sensor was fabricated for the ultimate goal of real-time monitoring of accumulated charge. As an effort to reach the ultimate goal, fabricated sensor was used for electrical potential measurements of via holes between two poly-Si electrodes and roughly characterized under various plasma conditions using statistical design of experiment (DOE). The successful identification of potential difference under various plasma conditions not only supports the evidence of potential charge-up damage, but also leads the direction of future study.

Sensitivity Analysis of Plasma Charge-up Monitoring Sensor

  • Lee Sung Joon;Soh Dea-Wha;Hong Sang Jeen
    • Journal of information and communication convergence engineering
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    • v.3 no.4
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    • pp.187-190
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    • 2005
  • High aspect ratio via-hole etching process has emerged as one of the most crucial means to increase component density for ULSI devices. Because of charge accumulation in via-hole, this sophisticated and important process still hold several problems, such as etching stop and loading effects during fabrication of integrated circuits. Indeed, the concern actually depends on accumulated charge. For monitoring accumulated charge during plasma etching process, charge-up monitoring sensor was fabricated and tested under some plasma conditions. This paper presents a neural network-based technique for analyzing and modeling several electrical performance of plasma charge-up monitoring sensor.

Understanding of the effect of charge size to temperature profile in the Czochralski method (쵸크랄스키법에서 온도 프로파일에 대한 충진사이즈의 효과에 대한 이해)

  • Baik, Sungsun;Kwon, Sejin;Kim, Kwanghun
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.28 no.4
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    • pp.141-147
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    • 2018
  • Solar energy has attracted big attentions as one of clean and unlimited renewable energy. Solar energy is transformed to electrical energy by solar cells which are comprised of multi-silicon wafer or mono-silicon wafer. Monosilicon wafers are fabricated from the Czochralski method. In order to decrease fabrication cost, increasing a poly-silicon charge size in one quartz crucible has been developed very much. When we increase a charge size, the temperature control of a Czochralski equipment becomes more difficult due to a strong melt convection. In this study, we simulated a Czochralski equipment temperature at 20 inch and 24 inch in quartz crucible diameter and various charge sizes (90 kg, 120 kg, 150 kg, 200 kg, 250 kg). The simulated temperature profiles are compared with real temperature profiles and analyzed. It turns out that the simulated temperature profiles and real temperature profiles are in good agreement. We can use a simulated profile for the optimization of real temperature profile in the case of increasing charge sizes.

A Subthreshold Slope and Low-frequency Noise Characteristics in Charge Trap Flash Memories with Gate-All-Around and Planar Structure

  • Lee, Myoung-Sun;Joe, Sung-Min;Yun, Jang-Gn;Shin, Hyung-Cheol;Park, Byung-Gook;Park, Sang-Sik;Lee, Jong-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.12 no.3
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    • pp.360-369
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    • 2012
  • The causes of showing different subthreshold slopes (SS) in programmed and erased states for two different charge trap flash (CTF) memory devices, SONOS type flash memory with gate-all-around (GAA) structure and TANOS type NAND flash memory with planar structure were investigated. To analyze the difference in SSs, TCAD simulation and low-frequency noise (LFN) measurement were fulfilled. The device simulation was performed to compare SSs considering the gate electric field effect to the channel and to check the localized trapped charge distribution effect in nitride layer while the comparison of noise power spectrum was carried out to inspect the generation of interface traps ($N_{IT}$). When each cell in the measured two memory devices is erased, the normalized LFN power is increased by one order of magnitude, which is attributed to the generation of $N_{IT}$ originated by the movement of hydrogen species ($h^*$) from the interface. As a result, the SS is degraded for the GAA SONOS memory device when erased where the $N_{IT}$ generation is a prominent factor. However, the TANOS memory cell is relatively immune to the SS degradation effect induced by the generated $N_{IT}$.

Synthesis and Characterizations of Mn1+XCo2-XO4 Solid Solution Catalysts for Highly Efficient Li/Air Secondary Battery (고효율의 리튬/공기 이차전지 공기전극용 Mn1+XCo2-XO4 고용체 촉매 합성 및 분석)

  • Park, Inyeong;Jang, Jaeyong;Lim, Dongwook;Kim, Taewoo;Shim, Sang Eun;Park, Seok Hoon;Baeck, Sung-Hyeon
    • Journal of the Korean Electrochemical Society
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    • v.18 no.4
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    • pp.137-142
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    • 2015
  • $Mn_{1+X}Co_{2-X}O_4$ solid solutions with various Mn/Co ratios were synthesized by a combustion method, and used as cathode catalysts for lithium/air secondary battery. Their electrochemical and physicochemical properties were investigated. The morphology was examined by transmission electron microscopy (TEM), and the crystallinity was confirmed by X-ray diffraction (XRD) analyses. For the measurement of electrochemical properties, charge and discharge measurements were carried out at a constant current density of $0.2mA/cm^2$, monitoring the voltage change. Electrochemical impedance spectroscopy (EIS) analyses were also employed to examine the change in charge transfer resistance during charge-discharge process. $Mn_{1+X}Co_{2-X}O_4$ solid solutions showed enhanced cycleability as a cathode of Li/air secondary battery, and the performance was found to be strongly dependent on Mn/Co ratio. Among synthesized catalysts, $Mn_{1.5}Co_{1.5}O_4$ exhibited the best performance and cycleability, due to high charge transfer rate.

Influence of Sustain Voltage on Wall Charge and Wall Voltage Characteristics in AC-PDPs

  • Kim, T.Y.;Cho, T.S.;Kim, S.S.;Cho, D.S.;Kim, J.G.;Ahn, J.C.;Jung, Y.H.;Lim, J.Y.;Jung, J.M.;Ko, J.J.;Kim, D.I.;Lee, C.W.;Seo, Y.;Cho, G.S.;Choi, E.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.119-120
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    • 2000
  • Influences of sustain voltage on wall charges and wall voltages are experimentally investigated in surface AC plasma display panels(AC-PDPs), in which electrode gap and width are $80\;{\mu}m$ and $270\;{\mu}m$, respectively. The filling gas is Ne-Xe gas mixture, and total pressures 300 Torr. Also it is found that the more amount of Xe mixing ratio makes the less wall charge and voltage for sustain voltage ranged from 140 V to 222 V. The response time has been delayed by adding a small amount of Xe to Ne in comparison with that without Xe. It is also found that the wall charge and voltage are reduced by adding a small amount of Xe to Ne in comparison with those without Xe.

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