• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.254-259
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• 2015

This paper reports the optimized mixed-signal performance of a high-voltage (HV) laterally double-diffused metaloxide-semiconductor (LDMOS) field-effect transistor (FET) with a dual gate oxide (DGOX). The fabricated device is based on the split-gate FET concept. In addition, the gate oxide on the source-side channel is thicker than that on the drain-side channel. The experiment results showed that the electrical characteristics are strongly dependent on the source-side channel length with a thick gate oxide. The digital and analog performances according to the source-side channel length of the DGOX LDMOS device were examined for circuit applications. The HV DGOX device with various source-side channel lengths showed reduced by maximum 37% on-resistance (R_ON) and 50% drain conductance (g_ds). Therefore, the optimized mixed-signal performance of the HV DGOX device can be obtained when the source-side channel length with a thick gate oxide is shorter than half of the channel length.

• Journal of Semiconductor Engineering
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• v.3 no.2
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• pp.161-167
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• 2022

Electrical characteristics of LDMOS power device with LDD(Lightly Doped Drain) structure is studied with variation of the region of channel and LDD. The channel in LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of CMOS inverter. Two-dimensional TCAD MEDICI simulation is used to study hot-carrier effect, on-resistance Ron, breakdown voltage, and transient switching characteristic. The voltage-transfer characteristics and on-off switching properties are studied as a function of the channel length and doping levels. The digital logic levels of the output and input voltages are analyzed from the transfer curves and circuit operation. Study indicates that drain current significantly depends on the channel length rather than the LDD region, while the switching transient time is almost independent of the channel length. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• Journal of information and communication convergence engineering
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• v.5 no.3
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• pp.229-232
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• 2007

This paper investigates on the use of constant-amplitude zero-autocorrelation (CAZAC) sequence for channel estimation in multiple-input multiple-output (MIMO) system over indoor wireless channel. Since the symbol-length of the conventional 4-phase CAZAC sequence is short, there is a limitation to use it for MIMO system in multipath environments. An algorithm which generates longer CAZAC sequences is proposed to overcome that problem. Flexible symbol-length of 4-phase CAZAC sequences can be made by the proposed algorithm. Therefore appropriate symbol-length of CAZAC sequences could be utilized as preambles in accordance with the number of transmit antennas and channel condition. The effect of the number of CAZAC sequences for channel estimation is presented in terms of mean square error (MSE).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.2
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• pp.285-290
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• 2010

We investigate the outage probability in terms of QoS (quality of service) in indoor PLC network. We consider various kinds of appliances for realistic indoor PLC network. For estimation of the outage probability, we calculate the time-varying channel responses considering the loading conditions based on regular human activities and include the additive noise. We calculate the outage probability for each terminal and investigate relationship between the outage probability and the channel length, and transmit powers. Our results suggest that the outage probability is increased when the channel length becomes longer because more appliances affect the amount of reduced channel capacity and is not improved distinctly for very high and low outage threshold by increasing the transmit power. However, we can see outage probability improvement for 30% outage threshold case by increasing the transmit power.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.4
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• pp.547-554
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• 1990

Considering channel length modulation, we proposed a GaAs MESFET model for circuit simulator. In existing M.S. Shur's model, two different models are used according to pinch-off voltage of devices. One model for both type of devices was proposed. In this model we introduced weighted switching function(WSF) based on channel length modulation. This proposed model showed better accuracy comparing with existing single law model and complete velocity saturation model.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.1
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• pp.11-20
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• 2008

The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

• Journal of ILASS-Korea
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• v.28 no.4
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• pp.198-206
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• 2023

In this study, visualization of in-cylinder spray behavior and spark channel stretching by air flow characteristics depending on engine operating conditions were investigated. For in-cylinder spray behavior, increase in engine rpm did not alter the counter-clockwise air flow direction and location of in-cylinder dominant air flow but increased average air flow velocity, which hindered spray propagation parallel to the piston surface. When injection timing was retarded, direction of in-cylinder dominant air flow was changed, and average air flow velocity was reduced resulting in an increase in spray penetration length and change in direction. For spark channel stretching, increase in air flow speed did not affect spark channel stretch direction but affected length due to increase in spark channel resistance and limitation of energy ignition coil can handle. Change in air flow direction affected spark channel stretch direction where the air flow was obstructed by ground electrode which caused spark channel direction to occur in the opposing direction of air flow. It also affected spark channel stretch length due to change in air flow speed around the spark plug electrode from the interaction between the air flow and ground electrode.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.897-900
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• 2005

RF linearity of double-gate MOSFETs is investigated using accurate two-dimensional simulations. The linearity has been analyzed using the Talyor series. Transconductance is dominant nonlinear source of CMOS. It is shown that DGMOSFET linearity can be improved by a careful optimization of channel thickness, gate oxide thickness, gate length, overlap length and channel doping concentration. The minimum $P_{IP3}$ data are compared in each case. It is shown that DG-MOSFET linearity can be improved by a careful optimization of channel thickness, gate oxide thickness, gate length, overlap length and channel doping concentration..

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.480-484
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• 2000

The channel length influence of n-channel Si-based FETs is investigated by computer simulation. Using a two-dimensional hydrodynamic model, devices having various gate length are examined. We have observed the characteristics of LDD model of MOSFET by investigating of their current, voltage, electric field and impact ionization. These devices are scaled using various factors. We have analyzed I-V characteristics and the effect of impact ionization according to channel length.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.10 no.1
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• pp.129-136
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• 1998

Pressure drop and heat transfer characteristics of a periodically fully developed flow in the flat channel with protrusions are investigated. The effects of shape and location of protrusion on the pressure drop and heat transfer are numerically analyzed in the present study. Taguchi method is used to optimize these parameters. It is found that the ratio of the height of protrusion to channel height shows larger influence on the pressure drop and heat transfer than the ratio of the length of protrusion to module length. As the height of protrusion increases, pressure drop and heat transfer increase, but if the height of protrusion exceeds 2/3 of the channel height, there is a substantial pressure drop. The results also show that the optimal length and height of protrusion are half of the module length and half of the channel height, respectively.