• 제목/요약/키워드: channel barrier

검색결과 214건 처리시간 0.032초

Breakdown Characteristics for Insulation Design of HTS Transformer in Liquid Nitrogen

  • J.M. Joung;S.M. Baek;Kim, S.H.
    • 한국초전도ㆍ저온공학회논문지
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    • 제5권3호
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    • pp.38-42
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    • 2003
  • HTS transformer is promising one of HTS power applications to be commercialized in the near future. To realize the applications, insulation technology in the coolant, liquid nitrogen, should be established. So breakdown characteristics should be considered at insulation components; turn-to-turn, layer-to-layer, winding-to-winding, were investigated. Firstly breakdown strengths of Kapton films were compared with Kraft paper these are as turn insulator. And next the characteristics of surface flashover on FRP were measured and the influence on breakdown strength of bubble generated with joule heat was discussed with the shape of cooling channel between layers. Finally barrier effect at winding-to-winding was discussed.

Recessed-gate 4H-SiC MESFET의 DC특성에 관한 연구 (Study on DC Characteristics of 4H-SiC Recessed-Gate MESFETs)

  • 박승욱;황웅준;신무환
    • 한국재료학회지
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    • 제13권1호
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    • pp.11-17
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    • 2003
  • DC characteristics of recessed gate 4H-SiC MESFET were investigated using the device/circuit simulation tool, PISCES. Results of theoretical calculation were compared with the experimental data for the extraction of modeling parameters which were implemented for the prediction of DC and gate leakage characteristics at high temperatures. The current-voltage analysis using a fixed mobility model revealed that the short channel effect is influenced by the defects in SiC. The incomplete ionization models are found out significant physical models for an accurate prediction of SiC device performance. Gate leakage is shown to increase with the device operation temperatures and to decrease with the Schottky barrier height of gate metal.

채널길이 및 두께 비에 따른 비대칭 DGMOSFET의 드레인 유도 장벽 감소현상 (Drain Induced Barrier Lowering for Ratio of Channel Length vs. Thickness of Asymmetric Double Gate MOSFET)

  • 정학기
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2015년도 춘계학술대회
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    • pp.839-841
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    • 2015
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 채널길이와 채널두께의 비에 따른 드레인 유도 장벽 감소 현상의 변화에 대하여 분석하고자한다. 드레인 전압이 소스 측 전위장벽에 영향을 미칠 정도로 단채널을 갖는 MOSFET에서 발생하는 중요한 이차효과인 드레인 유도 장벽 감소는 문턱전압의 이동 등 트랜지스터 특성에 심각한 영향을 미친다. 드레인 유도 장벽 감소현상을 분석하기 위하여 포아송방정식으로부터 급수형태의 전위분포를 유도하였으며 차단전류가 $10^{-7}A/m$일 경우 비대칭 이중게이트 MOSFET의 상단게이트 전압을 문턱전압으로 정의하였다. 비대칭 이중게이트 MOSFET는 단채널효과를 감소시키면서 채널길이 및 채널두께를 초소형화할 수 있는 장점이 있으므로 본 연구에서는 채널길이와 두께 비에 따라 드레인 유도 장벽 감소를 관찰하였다. 결과적으로 드레인 유도 장벽 감소 현상은 단채널에서 크게 나타났으며 하단게이트 전압, 상하단 게이트 산화막 두께 그리고 채널도핑 농도 등에 따라 큰 영향을 받고 있다는 것을 알 수 있었다.

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Simple Preparation of One-dimensional Metal Selenide Nanomaterials Using Anodic Aluminum Oxide Template

  • Piao, Yuanzhe
    • Journal of Electrochemical Science and Technology
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    • 제3권1호
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    • pp.35-43
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    • 2012
  • Highly ordered and perforated anodic aluminum oxide membranes were prepared by anodic oxidation and subsequent removal of the barrier layer. By using these homemade anodic aluminum oxide membranes as templates, metal selenide nanowires and nanotubes were synthesized. The structure and composition of these one-dimensional nanomaterials were studied by field emission scanning electron microscopy as well as transmission electron microscopy and energy dispersive X-ray spectroscopy. The growth process of metal selenide inside anodic aluminum oxide channel was traced by investigating the series of samples using scanning electron microscopy after reacting for different times. Straight and dense copper selenide and silver selenide nanowires with a uniform diameter were successfully prepared. In case of nickel selenide, nanotubes were preferentially formed. Phase and crystallinity of the nanostructured materials were also investigated.

솔레노이드형 고온초전도코일 모의전극계에서 부분 및 완전파괴전압특성 연구 (A Study of PBD and BD Voltage Characteristics in the Simulate Electrode System of Solenoid Type High Temperature Superconducting Coils)

  • 석복렬
    • 한국초전도ㆍ저온공학회논문지
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    • 제4권1호
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    • pp.94-98
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    • 2002
  • The Partial breakdown (PBD) and complete breakdown (BD) voltage characteristics in a composite insulation system of glass fiber reinforced plastics (GFRP) and liquid nitrogen are investigated to find the PBB and BD characteristics in solenoid type high temperature superconducting (HTS) coils at quench. The electrode system used is made from a coaxial spiral coil-to-cylindrical electrode with an insulation barrier and spacers, and is immersed in liquid nitrogen. A heater is mounted inside the coil electrode to generate boiling which occurs on quenched superconducting coils. The experimental results show that: (1) breakdown voltages are affected severely by the risetime of the applied voltage and the PBD inception voltage, (2) two kinds of BD mechanisms are found depending on the shape of the spacer, length of cooling channel and heater power.

마이크로믹서의 혼합해석을 위한 매핑법 적용 (Application of a mapping method for mixing analysis of micromixers)

  • 강태곤;;;권태헌
    • 대한기계학회:학술대회논문집
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    • 대한기계학회 2008년도 추계학술대회A
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    • pp.1758-1760
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    • 2008
  • Under typical operating conditions, flows in microfluidic devices are laminar and molecular diffusion across the channels is slow, which makes an efficient mixing in microfluidic devices difficult to achieve. The mechanism to achieve effective mixing in laminar flows is that of repetitive stretching and folding. Essential is to generate spatially periodic flows with crossing cross sectional streamlines. A mapping method is employed to analyze mixing in micromixers, enabling us to investigate the progress of mixing both qualitatively and quantitatively. The progress of mixing is characterized by a measure of mixing, called the discrete intensity of segregation. The mapping method is applied to mixing in such micromixers as the staggered herringbone mixer, the barrier embedded micromixer, and the three-dimensional serpentine channel to demonstrate the capability of the numerical scheme to tackle general mixing problems in microfluidic devices.

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Sticking and Desorption of Atomic Hydrogen on the Armchair Edges of Bilayer Graphene

  • Natividad, Michelle;Arboleda Jr., Nelson;Kasai, Hideaki
    • Journal of Electrochemical Science and Technology
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    • 제7권3호
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    • pp.185-189
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    • 2016
  • The coupled channel method via the Local Reflection (LORE) matrix is employed to investigate the quantum mechanical behavior of the sticking or adsorption and desorption of hydrogen (H) atom on bilayer graphene via the armchair edge. The sticking and desorption probabilities of H are calculated and are plotted against the initial translational energy of H. The sticking probability plot shows a barrierless reaction indicating that hydrogen is easily adsorbed on the armchair edge of graphene. The desorption probability plot, however, shows that desorption of H from the graphene sheets is an activated process with a barrier height of 4.19 eV suggesting that a strong bond exists between the adsorbed H atom and the edge carbon atom. Thus, temperatures higher than the operating temperatures (300 - 1500 K) of conventional fuel cells are necessary to release the adsorbed H atom from the armchair edge of graphene.

비대칭 DGMOSFET의 채널도핑농도에 따른 드레인 유도 장벽 감소현상 분석 (Analysis of Drain Induced Barrier Lowering of Asymmetric Double Gate MOSFET for Channel Doping Concentration)

  • 정학기;권오신
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2015년도 추계학술대회
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    • pp.858-860
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    • 2015
  • 본 연구에서는 비대칭 이중게이트 MOSFET의 채널 내 도핑농도에 대한 드레인 유도 장벽 감소 현상에 대하여 분석하고자한다. 드레인 유도 장벽 감소 현상은 드레인 전압에 의하여 소스 측 전위장벽이 낮아지는 효과로서 중요한 단채널 효과이다. 이를 분석하기 위하여 포아송방정식을 이용하여 해석학적 전위분포를 구하였으며 전위분포에 영향을 미치는 채널도핑 농도뿐만이 아니라 상하단 산화막 두께, 하단 게이트 전압 등에 대하여 드레인 유도 장벽 감소 현상을 관찰하였다. 결과적으로 드레인 유도 장벽 감소 현상은 채널도핑 농도에 따라 큰 변화를 나타냈다. 단채널 효과 때문에 채널길이가 짧아지면 도핑농도에 따른 영향이 증가하였다. 도핑농도에 대한 드레인유도장벽감소 현상의 변화는 상하단 산화막 두께에 따라 큰 변화를 보였으며 산화막 두께가 증가할수록 도핑농도에 따른 변화가 증가하는 것을 알 수 있었다. 또한 하단게이트 전압은 그 크기에 따라 도핑농도의 영향이 변화하고 있다는 것을 알 수 있었다.

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Dual Gate-Controlled SOI Single Electron Transistor: Fabrication and Coulomb-Blockade

  • Lee, Byung T.;Park, Jung B.
    • Journal of Electrical Engineering and information Science
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    • 제2권6호
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    • pp.208-211
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    • 1997
  • We have fabricated a single-electron-tunneling(SET) transistor with a dual gate geometry based on the SOI structure prepared by SIMOX wafers. The split-gate is the lower-gate is the lower-level gate and located ∼ 100${\AA}$ right above the inversion layer 2DEG active channel, which yields strong carrier confinement with fully controllable tunneling potential barrier. The transistor is operating at low temperatures and exhibits the single electron tunneling behavior through nano-size quantum dot. The Coulomb-Blockade oscillation is demonstrated at 15mK and its periodicity of 16.4mV in the upper-gate voltage corresponds to the formation of quantum dots with a capacity of 9.7aF. For non-linear transport regime, Coulomb-staircases are clearly observed up to four current steps in the range of 100mV drain-source bias. The I-V characteristics near the zero-bias displays typical Coulomb-gap due to one-electron charging effect.

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HTS pancake 코일을 모의한 전극계에서의 전기절연 특성 (Electrical insulation characteristics with simulated electrode system of HTS)

  • 정종만;백승명;김상현
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 제4회 영호남학술대회 논문집
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    • pp.58-63
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    • 2002
  • For the experiment the four types of spacer were distinguished by arrangement. The flashover characteristic on each types of spacer was investigated and the flashover phenomena were observed to understand breakdown mechanism in liquid nitrogen($LN_{2}$). The spacer should be placed interior coil as an insulator, a cooling channel and s supporter of structures. The simulated electrode used in the experiment was made from five turns of HTS tape. Experimental results revealed that multi-layer and barrier effects did work well in Air but did not in $LN_{2}$. These result suggested that the flashover in LN2 caused by the bubbles due to partial discharge at micro gap, g. The flashover characteristics decreased to 70% when g is 0.2 mm. The degradation was improved by even treatment on surface of coil electrode.

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