• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.99.2-99.2
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• 2012

현재 양산 중인 대부분의 결정질 실리콘 태양전지는 p-type 실리콘 기판의 전면에 인 (phosphorus) 을 확산시켜 에미터로 사용한 스크린 프린티드 태양전지 (Screen Printed Solar Cells) 이다. 위 태양전지의 단점은 p-type 기판의 광열화현상 (Light Induced Degradation) 문제와 후면 알루미늄 금속 전극으로 인한 휨 현상 등이 있다. 이러한 단점을 해결하기 위해 n-type 기판의 전면에 보론 (Boron) 을 도핑하여 에미터로 사용하고, 후면 전계 (Back Surface Field) 로 인 (Phosphorus)을 도핑한 태양전지에 대한 연구가 활발히 진행 중이다. 본 연구에서는, 튜브 전기로 (tube furnace) 를 이용해 n-type 실리콘 웨이퍼 전면에 보론 도핑을 하고 이와 마찬가지로 웨이퍼 후면에 인 도핑을 실시하였다. 그리고 전면과 후면의 패시베이션을 위해 얇게 산화막을 형성한 후 실리콘 질화막 (SiNx) 을 증착하였다. 에미터와 후면 전계 그리고 패시베이션 층의 특성을 평가하기 위해 QSSPC (Quasi-Steady-State PhotoConductance) 로 소수반송자 수명 (Minority Carrier Lifetime) 과 포화 전류 (Saturation current) 값을 측정하였다.

• Current Photovoltaic Research
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• 제1권1호
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• pp.69-72
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• 2013

Combined nano- and micro-wires (CNMWs) Si arrays were prepared using PR patterning and silver-assisted electroless etching. A $POCl_3$ doping process was applied to the fabrication of CNMWs solar cells. KOH solution was used to remove bundles in CNMWs and the etching time was varied from 30 to 240 s. The lowest reflectance of 3.83% was obtained at KOH etching time of 30 s, but the highest carrier lifetime of $354{\mu}s$ was observed after the doping process at 60 s. At the same etching time, a $V_{oc}$ of 574 mV, $J_{sc}$ of $28.41mA/cm^2$, FF of 74.4%, and Eff. of 12.2% were achieved in the CNMWs solar cell. CNMWs solar cells have potential for higher efficiency by improving the post-process and surface-rear side structure.

• 대한조선학회논문집
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• 제41권4호
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• pp.77-84
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• 2004

Active control is regarded as one of the most efficient and economic countermeasures to reduce excessive vibration of ship superstructure. However, it is difficult to find its practical application in real ships in spite that many studies on such systems have been done. In this study, for the practical use of an active control system to reduce ship superstructure vibration, we have developed an active vibration compensator consisting of a mechanical actuator having compact size and expected lifetime over 20 years, its control panel including exclusive signal processing and computing board, sensors to detect phase and vibration, and its operation software providing various user-interface functions. From the performance verification test of the system at a 5,500 TEU container carrier, we have confirmed the system could reduce ship superstructure vibration of a harmonic component of main engine rotating frequency up to 0.1 mm/s.

• Nuclear Engineering and Technology
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• 제49권1호
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• pp.209-215
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• 2017

Fast neutron irradiation was used to improve the switching speed of a 600-V nonpunch-through insulated gate bipolar transistor. Fast neutron irradiation was carried out at 30-MeV energy in doses of $1{\times}10^8n/cm^2$, $1{\times}10^9n/cm^2$, $1{\times}10^{10}n/cm^2$, and $1{\times}10^{11}n/cm^2$. Electrical characteristics such as current-voltage, forward on-state voltage drop, and switching speed of the device were analyzed and compared with those prior to irradiation. The on-state voltage drop of the initial devices prior to irradiation was 2.08 V, which increased to 2.10 V, 2.20 V, 2.3 V, and 2.4 V, respectively, depending on the irradiation dose. This effect arises because of the lattice defects generated by the fast neutrons. In particular, the turnoff delay time was reduced to 92 nanoseconds, 45% of that prior to irradiation, which means there is a substantial improvement in the switching speed of the device.

• 한국재료학회지
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• 제30권5호
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• pp.262-266
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• 2020

In this paper, we investigated the effect of the passivation stack with Al₂O₃, hydrogenated silicon nitride (SiN_x:H) stack and Al₂O₃, silicon oxynitride (SiON_x) stack in the n type bifacial solar cell on monocrystalline silicon. SiNx:H and SiON_x films were deposited by plasma enhanced chemical vapor deposition on the Al₂O₃ thin film deposited by thermal atomic layer deposition. We focus on passivation properties of the two stack structure after laser ablation process in order to improve bifaciality of the cell. Our results showed SiN_x:H with Al₂O₃ stack is 10 mV higher in implied open circuit voltage and 60 ㎲ higher in minority carrier lifetime than SiON_x with Al₂O₃ stack at Ni silicide formation temperature for 1.8% open area ratio. This can be explained by hydrogen passivation at the Al₂O₃/Si interface and Al₂O₃ layer of laser damaged area during annealing.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.122-122
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• 2010

ZnO is a widely investigated material for the blue and ultraviolet solid-state emitters and detectors. It has been promoted due to a wide-band gap semiconductor which has large exciton binding energy of 60 meV, chemical stability and low radiation damage. However, there are many problems to be solved for the growth of p-type ZnO for practical device applications. Many researchers have made an efforts to achieve p-type conductivity using group-V element of N, P, As, and Sb. In this letter, we have studied the optical characteristics of the antimony-doped ZnO (ZnO:Sb) thin films by means of photoluminescence (PL), PL excitation, temperature-dependent PL, and time-resolved PL techniques. We observed donor-to-acceptor-pair transition at about 3.24 eV with its phonon replicas with a periodic spacing of about 72 meV in the PL spectra of antimony-doped ZnO (ZnO:Sb) thin films at 12 K. We also investigate thermal activation energy and carrier recombination lifetime for the samples. Our result reflects that the antimony doping can generate shallow acceptor states, leading to a good p-type conductivity in ZnO.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.323-323
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• 2010

Saw damage of crystalline silicon wafer is unavoidable factor. Usually, alkali treatment for removing the damage has been carried out as the saw damage removal (SDR) process for priming the alkali texture. It usually takes lots of time and energy to remove the sawed damages for solar grade crystalline silicon wafers We implemented two different mixed acidic solution treatments to obtain the improved surface structure of silicon wafer without much sacrifice of the silicon wafer thickness. At the first step, the silicon wafer was dipped into the mixed acidic solution of $HF:HNO_3$=1:2 ration for polished surface and at the second step, it was dipped into the diluted mixed acidic solution of $HF:HNO_3:H_2O$=7:3:10 ratio for porous structure. This double treatment to the silicon wafer brought lower reflectance (25% to 6%) and longer carrier lifetime ($0.15\;{\mu}s$ to $0.39\;{\mu}s$) comparing to the bare poly-crystalline silicon wafer. With optimizing the concentration ratio and the dilution ratio, we can not only effectively substitute the time consuming process of SDR to some extent but also skip plasma enhanced chemical vapor deposition (PECVD) process. Moreover, to conduct alkali texture for pyramidal structure on silicon wafer surface, we can use only nitric acid rich solution of the mixed acidic solution treatment instead of implementing SDR.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.379-379
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• 2010

Recent technical advances in OLEDs (organic light emitting devices) requires more and more the improvement in low operation voltage, long lifetime, and high luminance efficiency. Inverted top emission OLEDs (ITOLED) appeared to overcome these problems. This evolved to operate better luminance efficiency from conventional OLEDs. First, it has large open area so to be brighter than conventional OLEDs. Also easy integration is possible with Si-based driving circuits for active matrix OLED. But, a proper buffer layer for carrier injection is needed in order to get a good performance. The buffer layer protects underlying organic materials against destructive particles during the electrode deposition and improves their charge transport efficiency by reducing the charge injection barrier. Hexaazatriphenylene-hexacarbonitrile (HAT-CN), a discoid organic molecule, has been used successfully in tandem OLEDs due to its high workfunction more than 6.1 eV. And it has the lowest unoccupied molecular orbital (LUMO) level near to Fermi level. So it plays like a strong electron acceptor. In this experiment, we measured energy level alignment and hole current density on inverted OLED structures for hole injection. The normal film structure of Al/NPB/ITO showed bad characteristics while the HAT-CN insertion between Al and NPB greatly improved hole current density. The behavior can be explained by charge generation at the HAT-CN/NPB interface and gap state formation at Al/HAT-CN interface, respectively. This result indicates that a proper organic buffer layer can be successfully utilized to enhance hole injection efficiency even with low work function Al anode.

• Journal of Electrochemical Science and Technology
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• 제10권3호
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• pp.321-328
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• 2019

A new miniaturized all solid-state contact Fe (III)-selective PVC membrane electrode based on Fe (II) phthalocyanine as a neutral carrier was described. The effects of the membrane composition and foreign ions on the electrode performance was investigated. The best performance was obtained with a membrane containing 32% poly (vinyl chloride), 64% dioctylsebacate, 3% Fe (II) phthalocyanine, and 1% potassium tetrakis (p-chlorophenyl) borate. The electrode showed near Nernstian response of $26.04{\pm}0.95mV/decade$ over the wide linear concentration range $1.0{\times}10^{-6}$ to $1.0{\times}10^{-1}M$, and a very low limit of detection $1.8{\pm}0.5{\times}10^{-7}M$. The potentiometric response of the developed electrode was independent at pH 3.5-5.7. The lifetime of the electrode was approximately 3 months and the response time was very short (< 7 s). It exhibited excellent selectivity towards Fe (III) over various cations. The miniaturized all solid-state contact Fe (III)-selective membrane electrode was successfully applied as an indicator electrode for the potentiometric titration of $1.0{\times}10^{-3}M$ Fe (III) ions with a $1.0{\times}10^{-2}M$ EDTA and the direct determination of Fe (III) ions in real water samples.

• 대한전자공학회논문지SD
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• 제43권3호
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• pp.1-8
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• 2006

본 논문에서는 채널 stress에 따른 Nano-scale CMOSFET의 소자 및 신뢰성 (HCI, NBTI)특성을 분석하였다. 잘 알려져 있듯이 NMOS는 tensile, PMOS는 compressive stress가 인가된 경우에 소자의 특성이 개선되었으며, 이는 전자와 정공의 이동도 증가에 의한 것임을 확인하였다. 그러나 신뢰성인 경우에는 소자 특성과는 다른 특성을 나타냈는데, NMOS와 PMOS 모두 tensile stress가 인가된 경우에 hot carrier 특성이 더 열화 되었으며, PMOS의 PBTI 특성도 tensile에서 더 열화 되었음을 확인하였다. 신뢰성을 분석한 결과, 채널의 tensile stress로 인하여 $Si/SiO_2$ 계면에서 interface trap charge의 생성과 산화막 내 positive fixed charge의 생성에 많은 영향을 끼침을 알 수 있었다. 그러므로 나노급 CMOSFET에 적용되는 strained-silicon MOSFET의 개발을 위해서는 소자의 성능 뿐 만 아니라 신뢰성 또한 고려되어야 한다.