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Characterization of the Dependence of the Device on the Channel Stress for Nano-scale CMOSFETs  

Han In-Shik (Dept. of Electronics Engineering, Chungnam National University)
Ji Hee-Hwan (Dept. of Electronics Engineering, Chungnam National University)
Kim Kyung-Min (Dept. of Electronics Engineering, Chungnam National University)
Joo Han-Soo (Dept. of Electronics Engineering, Chungnam National University)
Park Sung-Hyung (Dept. of Electronics Engineering, Chungnam National University)
Kim Young-Goo (Dept. of Electronics Engineering, Chungnam National University)
Wang Jin-Suk (MagnaChip semiconductor. Inc.)
Lee Hi-Deok (MagnaChip semiconductor. Inc.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.43, no.3, 2006 , pp. 1-8 More about this Journal
Abstract
In this paper, reliability (HCI, NBTI) and device performance of nano-scale CMOSFETs with different channel stress were investigated. It was shown that NMOS and PMOS performances were improved by tensile and compressive stress, respectively, as well known. It is shown that improved device performance is attributed to the increased mobility of electrons or holes in the channel region. However, reliability characteristics showed different dependence on the channel stress. Both of NMOS and PMOS showed improved hot carrier lifetime for compressive channel stress. NBTI of PMOS also showed improvement for compressive stress. It is shown that $N_{it}$ generation at the interface of $Si/SiO_2$ has a great effect on the reliability. It is also shown that generation of positive fixed charge has an effect in the NBTI. Therefore, reliability as well as device performance should be considered in developing strained-silicon MOSFET.
Keywords
ILD Layer; Mechanical stress; NBTI; Hot carrier injection; Positive fixed charge; Nano CMOSFET;
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