• 대한전자공학회논문지SD
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• 제41권7호
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• pp.21-29
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• 2004

본 논문에서는 Dual oxide를 갖는 Nano-scale CMOSFET에서 각 소자의 Hot carrier 특성을 분석하여 두 가지 중요한 결과를 나타내었다. 하나는 NMOSFET Thin/Thick인 경우 CHC stress 보다는 DAHC stress에 의한 소자 열화가 지배적이고, Hot electron이 중요하게 영향을 미치고 있는 반면에, PMOSFET에서는 특히 Hot hole에 의한 영향이 주로 나타나고 있다는 것이다. 다른 하나는, Thick MOSFET인 경우 여전히 NMOSFET의 수명이 PMOSFET의 수명에 비해 작지만, Thin MOSFET에서는 오히려 PMOSFET의 수명이 NMOSFET보다 작다는 것이다. 이러한 분석결과는 Charge pumping current 측정을 통해 간접적으로 확인하였다. 따라서 Nano-scale CMOSFET에서의 NMOSFET보다는 PMOSFET에 대한 Hot camel lifetime 감소에 관심을 기울여야 하며, Hot hole에 대한 연구가 진행되어야 한다고 할 수 있다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.327-330
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• 2004

It is shown that the hot carrier degradation due to enhanced hot holes trapping dominates PMOSFETs lifetime both in thin and thick devices. Moreover, it is found that in 0.13 ${\mu}m$ CMOSFET the PMOS lifetime under CHC (Channel Hot Carrier) stress is lower than the NMOSFET lifetime under DAHC (Drain Avalanche Hot Carrier) stress. Therefore. the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method and highly necessary to enhance overall device lifetime or circuit lifetime in upcoming nano-scale CMOS technology.

• Journal of Power Electronics
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• 제16권2호
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• pp.778-785
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• 2016

An excess carrier lifetime extraction method is derived for physics-based insulated gate bipolar transistor (IGBT) models with consideration of the latest development in IGBT modeling. On the basis of the 2D mixed-mode Sentaurus simulation, the clamp turn-off test is simulated to obtain the tail current. The proposed excess carrier lifetime extraction method is then performed using the simulated data. The comparison between the extracted results and actual lifetime directly obtained from the numerical device model precisely demonstrates the accuracy of the proposed method.

• 한국결정성장학회:학술대회논문집
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• 한국결정성장학회 1997년도 Proceedings of the 13th KACG Technical Meeting `97 Industrial Crystallization Symposium(ICS)-Doosan Resort, Chunchon, October 30-31, 1997
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• pp.155-159
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• 1997

We investigated the effect of mechanical backside damage in Czochralski silicon wafer. The intensity of mechanical damage were evaluated by minority carrier recombination lifetime by a laser excitation/microwave reflection photoconductance decay method, photo-acoustic displacement method, X-ray section topography, and wet oxidation/preferential etch methods. The data indicate that the higher the mechanical damage intensity, the lower the minority carrier lifetime, and the photoacoustic displacement values are also increased proportionally.

• 한국결정성장학회지
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• 제5권4호
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• pp.408-413
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• 1995

초크랄스키 실리콘 기판의 뒷면에 형성된 기계적 손상이 레이저 여기/극초단파 반사 광전도 감쇠법에 의한 소수반송자 재결합 수명 측정에 미치는 영향을 고찰하였다. 기계적손상의 정도는 X-선 이중결정 회절법과 X-선 단면 측정법 및 습식산화/선택적 식각 방법으로 평가하였다. 그 결과, 웨이퍼 뒷면에 가해지는 기계적 손상의 세기가 강할수록 소수반송자 재결합 수명은 짧아지고, 소수반송자 재결합 수명 측정에 영향을 미치는 반치전폭의 임계값은 약13초임을 알 수 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권4호
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• pp.311-317
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• 2008

The measurement of dark ${\sigma}_D$, gamma-induced ${\sigma}_{\gamma}$ conductivities and the expected conductivity modulation ${\Delta}_{\sigma}$ in silicon wafers/samples is studied for developing a new technique for carrier lifetime evaluation. In this paper a simple method is introduced to find the carrier lifetime variations with the measured conductivity and conductivity modulation under dark and gamma irradiation conditions. It will be concluded that this simple method enables us to give an improved wafer evaluation, processing and quality control in the field of photovoltaic materials and other electronic devices.

• 한국전기전자재료학회논문지
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• 제12권1호
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• pp.27-34
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• 1999

We investigated the effect of mechanical back side damage in viewpoint of electrical and surface morphological characteristics in Czochralski silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductance decay technique, atomic force microscope, optical microscope, wet oxidation/preferential etching methods. The data indicate that the higher the mechanical damage degree, the lower the minority carrier lifetime, and surface roughness, damage depth and density of oxidation induced stacking fault increased proportionally.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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• pp.985-988
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• 2004

The carrier lifetime of boron doped Cz silicon samples after light induced degradation could be improved by optimized rapid thermal processing (RTP). The important five different parameters varied in order to investigate which parameter is important for the stable lifetime after light induced degradation, $\tau_d$. The Plateau temperature and the Plateau time influenced on the lifetime after light induced degradation. Especially, the Plateau temperature showed a strong influence on the stable lifetime. The optimal plateau temperature is approximately $900^{\circ}C$ t for a plateau time of 120 s. The stable lifetime increased from $15\mu}s$ to $25.5{\mu}s$. The normalized defect concentration, $N_t^*$, decreased from $0.06{\mu}s^{-1}$ to $0.037{\mu}s^{-1}$ by RTP-process.

• 한국재료학회지
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• 제25권9호
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• pp.487-491
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• 2015

In photovoltaic power generation where minority carrier generation via light absorption is competing against minority carrier recombination, the substrate thickness and material quality are interdependent, and appropriate combination of the two variables is important in obtaining the maximum output power generation. Medici, a two-dimensional semiconductor device simulation tool, is used to investigate the interdependency in relation to the maximum power output in front-lit Si solar cells. Qualitatively, the results indicate that a high quality substrate must be thick and that a low quality substrate must be thin in order to achieve the maximum power generation in the respective materials. The dividing point is $70{\mu}m/5{\times}10^{-6}sec$. That is, for materials with a minority carrier recombination lifetime longer than $5{\times}10^{-6}sec$, the substrate must be thicker than $70{\mu}m$, while for materials with a lifetime shorter than $5{\times}10^{-6}sec$, the substrate must be thinner than $70{\mu}m$. In substrate fabrication, the thinner the wafer, the lower the cost of material, but the higher the cost of wafer fabrication. Thus, the optimum thickness/lifetime combinations are defined in this study along with the substrate cost considerations as part of the factors to be considered in material selection.

• 한국전기전자재료학회논문지
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• 제17권12호
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• pp.1264-1270
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• 2004

A fast switching thyristor with a superior trade-off property between the on-state voltage drop and the turn-off time could be fabricated by the proton irradiation method. After making symmetric thyristor dies with a voltage rating of 1,600 V from 350 $\mu$m thickness of 60 $\Omega$ㆍcm NTD-Si wafer and 200 $\mu$m width of n-base drift layer, the local carrier lifetime control by the proton irradiation was performed with help of the HI-13 tandem accelerator in China. The thyristor samples irradiated with 4.7 MeV proton beam showed a superior trade-off relationship of $V_{TM}$ = 1.55 V and $t_{q}$ = 15 $\mu$s attributed to a very narrow layer of short carrier lifetime(～1 $\mu$s) in the middle of its n-base drift region. To explain the small increase of $V_{TM}$ , we will introduce the effect of carrier compensation at the low carrier lifetime region by the diffusion current.ffusion current.t.