• Transactions of the Korean Society of Mechanical Engineers A
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• v.28 no.8 s.227
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• pp.1087-1092
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• 2004

Adhesion and friction forces influence adversely on performance and durability of MEMS. It has been reported that the adhesion and friction forces can be reduced with the introduction of micro surface bumps into the contacting interfaces. In this study experiments were conducted to investigate comparatively the effect of hemispherical and torus micro bumps on the adhesion and friction forces. It is confirmed that micro bumps reduce the adhesion and friction forces, and their effect is more pronounced with the bumps of smaller outer boundary radius. Moreover, the results shows that the torus bumps exhibit more rapid decrease of the adhesion and friction forces with the decrease in the outer boundary radius of bump than the hemispherical bumps. When the magnitude of adhesion force is same, the torus bumps generate smaller friction force than the hemispherical bumps. The usage of hemispherical and torus bumps to reduce the adhesion and friction forces in MEMS is discussed.

• Journal of Welding and Joining
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• v.22 no.3
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• pp.62-68
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• 2004

The strip Au bumps are bonded using longitudinal ultrasonic far the electronic package. Au bumps on the chip and substrate are aligned in a crossed shape, and the ultrasonic is imposed on the chip to form the solid-state bond between the Au bumps. Deformed bump shapes are calculated using the finite element method, and the bond strength is measured experimentally. The crossed strip Au bumps are deformed similar to the saddle, which provides larger contact surface area and higher friction force. Compared with the previous bonding method between the Au bump and planar pad, higher bond strength is obtained using the crossed strip bumps.

• Journal of the Korean Magnetics Society
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• v.4 no.2
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• pp.130-134
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• 1994

This paper describes the occurance of bumps in playback spectrum while reading with MIG heads. The amplitudes of the bumps in theoretically predicted frequencies are investigated by computer simulation. Three cases of MIG head structure are simulated, one without pseudo gaps, the other two with pseudo gap thicknesses of $0.02\;\mu\textrm{m}\;and\;0.2\;\mu\textrm{m}$ on both sides of the main gap, respectively. It is assumed that metal powder tapes are used. The results show that the bumps occur at predicted frequencies and the amplitudes of the bumps agree well with predicted values.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.1
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• pp.45-51
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• 2001

The effects of wettability and surface oxidation on the low temperature and ultra-fine solder bump formation have been studied. Difference sequences of near eutectic In-Ag and eutectic Bi-Sn solders were evaporated on Au/Cu/Cr or Au/Ni/Ti Under Bump Metallurgy (UBM) pads. Solder bumps were formed using lift-off method and were reflowed in Rapid Thermal Annealing (RTA) system. The solder bumps in which In was in contact with UBM in In-Ag solder and the solder bumps in which Sn was in contact with UBM in Bi-Sn solder showed better bump formability during reflow than other solder bumps. The ability to form spherical solder bumps was affected mainly by the wettability of solders to UBM pads.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.195-202
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• 2003

In this study, failure mechanisms of Au stud bumps/ACF flip chip joints were investigated underhigh current stressing condition. For the determination of allowable currents, I-V tests were performed on flip chip joints, and applied currents were measured as high as almost 4.2Amps $(4.42\times10^4\;Amp/cm^2)$. Degradation of flip chip joints was observed by in-situ monitoring of Au stud bumps-Al pads contact resistance. All failures, defined at infinite resistance, occurred at upward electron flow (from PCB pads to chip pads) applied bumps (UEB). However, failure did not occur at downward electron flow applied bumps (DEB). Only several $m\Omega$ contact resistance increased because of Au-Al intermetallic compound (IMC) growth. This polarity effect of Au stud bumps was different from that of solder bumps, and the mechanism was investigated by the calculation of chemical and electrical atomic flux. According to SEM and EDS results, major IMC phase was $Au_5Al_2$, and crack propagated along the interface between Au stud bump and IMC resulting in electrical failures at UEB. Therefore. failure mechanisms at Au stud bump/ACF flip chip Joint undo high current density condition are: 1) crack propagation, accompanied with Au-Al IMC growth. reduces contact area resulting in contact resistance increase; and 2) the polarity effect, depending on the direction of electrons. induces and accelerates the interfacial failure at UEBs.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.21-27
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• 2007

Nickel bumps for ACF(anisotropic conductive film) flip chip application were fabricated by electroless and electro plating and their mechanical properties and impact reliability were examined through the compressive test, bump shear test and drop test. Stress-displacement curves were obtained from the load-displacement data in the compressive test using nano-indenter. Electroplated nickel bumps showed much lower elastic stress limits (70MPa) and elastic moduli ($7.8{\times}10^{-4}MPa/nm$) than electroless plated nickel bumps ($600-800MPa,\;9.7{\times}10^{-3}MPa/nm$). In the bump shear test, the electroless plated nickel bumps were deformed little by the test blade and bounded off from the pad at a low shear load, whereas the electroplated nickel bumps allowed large amount of plastic deformation and higher shear load. Both electroless and electro plated nickel bumps bonded by ACF flip chip method showed high impact reliability in the drop impact test.

• Tribology and Lubricants
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• v.18 no.4
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• pp.249-254
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• 2002

Adhesive contact characteristics of torus-shaped bumps were analyzed using the finite element technique considering the adhesive force. Analyses focused on the effect of rim and bump radii on the adhesive contact behavior such as the jump-to-contact behavior, adhesion hysteresis, pull-off forces, contact region and pressure, and surface and subsurface stresses. Analysis results in the absence of adhesive force were also included to examine the effect of adhesive force. The applicability of torus-shaped bumps to the MEMS structure for reduction of friction is discussed.

• Proceedings of the KWS Conference
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• 2006.10a
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• pp.205-206
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• 2006

The microstructural evolutions and shear properties of the pure Sn solder bumps with Ni UBMs were investigated during multiple reflows and high temperature storage(HTS) tests. Only a $Ni_3Sn_4$ IMC was found at the bump/Ni UBM interface after 1 reflow. The layer thickness of these IMCs increased with increasing reflow number and testing time. The solder bumps showed a good reliability during multiple reflows and HTS tests.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.1005-1008
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• 2003

We report a new FCOG (flip chip on glass) technique using solder bumps for display packaging applications. The In and Sn solder bumps of 40 ${\mu}m$ pitches were formed on Si and glass substrate. The In and Sn bumps were bonded at 125 at the pressure of 3 mN/bump. The metallurgical bonding was confirmed using cross-sectional SEM. The contact resistance of the solder joint was 65 $m{\Omega}$ which was much lower than that of the joint made using the conventional ACF bonding technique. We demonstrate that the new COG technique using solder bump to bump direct bonding can be applied to advanced LCDs that lead to require higher quality, better resolution, and lower power consumption.

• ETRI Journal
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• v.36 no.4
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• pp.643-653
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• 2014

To reduce interconnect delay and power consumption while improving chip performance, a three-dimensional integrated circuit (3D IC) has been developed with die-stacking and through-silicon via (TSV) techniques. The power supply problem is one of the essential challenges in 3D IC design because IR-drop caused by insufficient supply voltage in a 3D chip reduces the chip performance. In particular, power bumps and TSVs are placed to minimize IR-drop in a 3D power delivery network. In this paper, we propose a design methodology for 3D power delivery networks to minimize the number of power bumps and TSVs with optimum mesh structure and distribute voltage variation more uniformly by shifting the locations of power bumps and TSVs while satisfying IR-drop constraint. Simulation results show that our method can reduce the voltage variation by 29.7% on average while reducing the number of power bumps and TSVs by 76.2% and 15.4%, respectively.