• Title/Summary/Keyword: broadband mixer

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Design and Implementation of Double Down-Converter for Satellite TV (위성 TV용 이중 하향 변환기의 설계 및 제작)

  • Lee, Seung-Dae
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.14 no.2
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    • pp.840-845
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    • 2013
  • In this paper, the broadband frequency double down-converter based on LC filter technologies has been designed and implemented, and its performances are introduced. The Designed frequency double down-converter is consisted with a low-noise amplifier, mixer, IF amplifier, LC filter, DC-block capacitor and RF-bypass capacitor. Especially, instead of active devices of a typical converter, the suggested converter designed using passive devices to provide both low-power consumption and low-cost model. As results of the measurement, the implemented frequency double down-converter realizes the broadband performance with the bandwidth of 100MHz (13~113MHz) at the center frequency of 63MHz, and its gain is approximately 40dB.

Design of a Distributed Mixer Using Dual-Gate MESFET's (Dual-Gate MESFET를 이용한 분포형 주파수 혼합기의 설계)

  • Oh, Yang-Hyun;An, Jeong-Sig;Kim, Han-Suk;Lee, Jong-Arc
    • Journal of IKEEE
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    • v.2 no.1 s.2
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    • pp.15-23
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    • 1998
  • In this paper, distributed mixer is studied at microwave frequency. The circuit of distributed mixer composed of gate 1,2, drain transmission lines, matching circuits in input and output terminal, DGFET's. For impedance matching of input and output port at higher frequency, image impedance concept is introduced. In distributed mixer, a DGFET's impedances are absorbed by artificial transmission line, this type of mixer can get a very broadband characteristics compared to that of current systems. A RF/LO signal is applied to each gate input port, and are excited the drain transmission line through transcondutance of the DGFET's. The output signals from each drain port of DGFET's added in same phases. We designed and frabricated the distributed mixer, and a conversion gain, noise figure, bandwidth, LO/RF isolation of the mixer are shown through computer simulation and experimentation.

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Design and Implementation of RF Module Part for Radar Detector (레이더 탐지기용 RF 모듈단 설계 및 구현)

  • Roh, Hee-Chang;Park, Wook-Ki;Jo, Yun-Hyun;Oh, Taeck-Keun;Park, Hyo-Dal
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5A
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    • pp.519-527
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    • 2010
  • In this paper, we design and implement a broadband LNA(Low Noise Amplifier), a mixer, and oscillators in RF module part for radar detector. For resolving the limitation of the conventional product that the sensitivity is low due to the poor gain flatness, we propose the architecture of RF module part. The proposed RF module part is composed with a broadband 2-stage LNA, a mixer, and three oscillators, and improves the maximum gain and gain flatness for detecting various frequencies. The overall performances of RF module part are above 38 dB conversion gain in whole band and 1 dB gain flatness. These results show that the maximum gain which is the problem of the conventional product is improved 6 dB from 35 dB to 41 dB, and gain flatness is also improved 17 dB from 22 dB to 5 dB.

An MMIC Broadband Image Rejection Downconverter Using an InGaP/GaAs HBT Process for X-band Application

  • Lee Jei-Young;Lee Young-Ho;Kennedy Gary P.;Kim Nam-Young
    • Journal of electromagnetic engineering and science
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    • v.6 no.1
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    • pp.18-23
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    • 2006
  • In this paper, we demonstrate a fully integrated X-band image rejection down converter, which was developed using InGaP/GaAs HBT MMIC technology, consists of two single-balanced mixers, a differential buffer amplifier, a differential YCO, an LO quadratue generator, a three-stage polyphase filter, and a differential intermediate frequency(IF) amplifier. The X-band image rejection downconverter yields an image rejection ratio of over 25 dB, a conversion gain of over 2.5 dB, and an output-referred 1-dB compression power$(P_{1dB,OUT})$ of - 10 dBm. This downconverter achieves broadband image rejection characteristics over a frequency range of 1.1 GHz with a current consumption of 60 mA from a 3-V supply.

Design and Fabrication of a Multi-Function Circuit to Implement Hybrid-Conversion RF Front-End for Broadband and Multiband System (광대역 및 다중 대역 시스템용 혼성 변환 방식 RF 전단부 구현을 위한 다중 기능 회로의 설계 및 제작)

  • Go, Min-Ho;Ju, Young-Rim;Jo, Yun-Hyun;Park, Hyo-Dal
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.3
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    • pp.292-300
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    • 2010
  • In this paper, we propose a RF front-end architecture based on hybrid conversion which is available to receive both broadband and multiband DVB-H receiver, and a multi-function circuit for implementing the RF front-end is fabricated. A multi-function circuit is operated as a sub-harmonic mixer mode in the case of receiving a broadband VHF/UHF band, which show a conversion loss of -10.0 dB, noise figure of 7.0 dB and IIP3 of 2.0 dBm. On the other hand, it is performed as a attenuation mode with a insertion loss of -10.0 dB in receiving a multiband, L-band.

Study on the Broadband RF Front-End Architecture (광대역 RF 전단부 구조에 관한 연구)

  • Go, Min-Ho;Pyo, Seung-Chul;Park, Hyo-Dal
    • The Journal of the Korea institute of electronic communication sciences
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    • v.4 no.3
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    • pp.183-189
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    • 2009
  • In this paper, we propose RF front-end architecture using hybrid conversion method to receive broadband signal. The validity is verified by design, fabrication and experiment. The proposed RF front-end architecture due to up-conversion block improves the deficiency of performance deterioration to be generated through harmonic signal and image signal conversion in the conventional RF front-end, and improves the deficiency of the complexity that is from to adopt a multiple local oscillators for the generation of wideband LO signal in the conventional RF front-end by applying the principle that tuning bandwidth is multiplied at sub-harmonic mixer. Manufactured circuits satisfy the deduced design specification and target standard with gain above 80 dB, noise figure below 6.0 dB and IIP3 performance above -5.0 dBm for the condition of the minimum gain in RF front-end.

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Design and Performance Analysis of the Multichannel I. F. Transceiver for Broadband Multimedia System (광대역 멀티미디어 시스템을 위한 다채널 중간 주파수 송수신기 설계 및 성능 분석)

  • Kim, Seong-Cheol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.5
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    • pp.1038-1044
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    • 2011
  • In this paper, the multichannel intermediate frequency transceiver for broadband multimedia system is designed and the experimental results are analyzed. Basic elements of the transceiver such as frequency synthesizer, amplifier, mixer, automatic gain control amplifier are introduced. The analysis technique described here applies not only to amplifier but also to any other nonlinear components such as mixers and frequency doubler. Through the investigation of the power spectrum density of the transmitted signal, the phase noise of the local oscillator is evaluated below 70 dBc/kHz. The frequency characteristics of the modulated signal is flat within the system bandwidth. Also the effects of adjacent channel interference and supurious emission are analyzed. And the function of automatic gain control amplifier is well operated.

Design and Implementation of a 40 Gb/s Clock Recovery Module Using a Phase-Locked Loop with the Clock-Hold Function (클락 유지 기능을 가지는 위상 고정 루프를 사용한 40 Gb/s 클락 복원 모듈 설계 및 구현)

  • Park Hyun;Woo Dong-Sik;Kim Jin-Jung;Lim Sang-Kyu;Kim Kang-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.2 s.105
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    • pp.171-177
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    • 2006
  • A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver with the clock-hold function has been designed and implemented. It consists of a clock extractor circuit, an RF mixer and a frequency discriminator for phase/frequency detection, a VC-DRO, a phase shifter, and a clock-hold circuit. The extracted 40 GHz clock is synchronized with a stable 10 GHz VC-DRO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module are significantly improved as compared with those of the conventional open-loop type clock recovery module with a DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When an input signal is dropped, the 40 GHz clock is maintained continuously by the hold circuit.

Development of Millimeter wave Transmitter and Receiver for Long Distance Wireless Transmission Using NRD waveguide (NRD 가이드를 이용한 장거리 무선통신용 밀리미터파 대역 송수신기 개발)

  • Park Sung-Hyun;Kim Soo-Hwan;hin Cheon-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.9A
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    • pp.867-875
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    • 2005
  • In this paper, we fabricated along distance wireless communication transmitter and receiver over the 100 which used NRD technology. To make the transmitter and receiver of 400Hz band using the non radiative dielectric wave guide, transmitter was composed of gm oscillator, m modulator and antenna, receiver was composed of local gum oscillator, balanced mixer, 3dB direction coupler and antenna. Also we executed a wireless communication image transmission examination to the transmitter and receiver. We receive the image information in real-time data transmission from receiver after we send the image signal in the wireless distance of the 10km. Therefore, the 400Hz band U transmitter and receiver to be developed will be used widely for the transmission system CATV or broadband transmission system. This will be utilized also to the link device of a long distance high speed wireless communication network.