• Title/Summary/Keyword: bit rate

Search Result 3,046, Processing Time 0.029 seconds

Exact BER Analysis of Physical Layer Network Coding for Two-Way Relay Channels (물리 계층 네트워크 코딩을 이용한 양방향 중계 채널에서의 정확한 BER 분석)

  • Park, Moon-Seo;Choi, Il-Hwan;Ahn, Min-Ki;Lee, In-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.37 no.5A
    • /
    • pp.317-324
    • /
    • 2012
  • Physical layer network coding (PNC) was first introduce by Zhang et al. for two-way relay channels (TWRCs). By utilizing the PNC, we can complete two-way communications within two time slots, instead of three time slots required in non-PNC systems. Recently, the upper and lower bounds for a bit error rate (BER) of PNC have been analyzed for fading channels. In this paper, we derive an exact BER of the PNC for the TWRC over fading channels. We determine decision regions based on the nearest neighbor rule and partition them into several wedge areas to apply the Craig's polar coordinate form for computing the BER. We confirm that our derived analysis accurately matches with the simulation results.

Design of 6-bit 800 Msample/s DSDA A/D Converter for HDD Read Channel (HDD 읽기 채널용 6-bit 800 Msample/s DSDA 아날로그/디지털 변환기의 설계)

  • Jeong, Dae-Yeong;Jeong, Gang-Min
    • The KIPS Transactions:PartA
    • /
    • v.9A no.1
    • /
    • pp.93-98
    • /
    • 2002
  • This paper introduces the design of high-speed analog-to-digital converter (ADC) for hard disk drive (HDD) read channel applications. This circuit is bated on fast regenerative autozero comparator for high speed and low-error rate comparison operation, and Double Speed Dual ADC (DSDA) architecture for efficiently increasing the overall conversion speed of ADC. A new type of thermometer-to-binary decoder appropriate for the autozero architecture is employed for no glitch decoding, simplifying the conventional structure significantly. This ADC is designed for 6-bit resolution, 800 Msample/s maximum conversion rate, 390 mW power dissipation, one clock cycle latency in 0.65 m CMOS technology.

CDMA Digital Mobile Communications and Message Security

  • Rhee, Man-Young
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.6 no.4
    • /
    • pp.3-38
    • /
    • 1996
  • The mobile station shall convolutionally encode the data transmitted on the reverse traffic channel and the access channel prior to interleaving. Code symbols output from the convolutional encoder are repeated before being interleaved except the 9600 bps data rate. All the symbols are then interleaved, 64-ary orthogonal modulation, direct-sequence spreading, quadrature spreading, baseband filtering and QPSK transmission. The sync, paging, and forward traffic channel except the pilot channel in the forward CDMA channel are convolutionally encoded, block interleaved, spread with Walsh function at a fixed chip rate of 1.2288 Mcps to provide orthogonal channelization among all code channels. Following the spreading operation, the I and Q impulses are applied to respective baseband filters. After that, these impulses shall be transmitted by QPSK. Authentication in the CDMA system is the process for confirming the identity of the mobile station by exchanging information between a mobile station and the base station. The authentication scheme is to generate a 18-bit hash code from the 152-bit message length appended with 24-bit or 40-bit padding. Several techniques are proposed for the authentication data computation in this paper. To protect sensitive subscriber information, it shall be required enciphering ceratin fields of selected traffic channel signaling messages. The message encryption can be accomplished in two ways, i.e., external encryption and internal encryption.

An ABR Rate Control Scheme Considering Wireless Channel Characteristics in the Wireless ATM Network (무선 ATM망에서 무선채널의 특성을 고려한 ABR 전송률 제어 방안)

  • Yi, Kyung-Joo;Min, Koo;Choi, Myung-Whan
    • Journal of KIISE:Information Networking
    • /
    • v.27 no.2
    • /
    • pp.206-218
    • /
    • 2000
  • Retransmissions on the DLC layer are essential to ABR service providing the low CLR (cell loss ratio) over the unreliable wireless channel with high bit error rate. In the wireless ATM, the DLC layer below ATM layer performs the retransmission and reordering of the cells to recover the cell loss over the wireless channel and by doing so, the effect of the wireless channel characteristics with high bit error rate can be minimized on the ATM layer which is designed under the assumption of the low bit error rate. We propose, in this paper, the schemes to reflect the changes of the transmission rate over the wireless channel on the ABR rate control. Proposed scheme can control the source rate to the changes of the transmission rate over the wireless channel and reduce the required buffer size in the AP (access point). In the simulation, we assume that the DLC layer can inform the ATM layer of the wireless channel quality as good or bad. Our simulation results show that the proposed schemes require the smaller buffer size compared with the existing scheme, enhanced dynamic max rate control algorithm (EDMRCA). It is also shown that the scheme with the intelligent DLC which adjusts the rate to the wireless channel quality not only provides the low CLR with smaller buffer requirement but also improves the throughput by utilizing the wireless bandwidth more efficiently.

  • PDF

An Effective of Rate Control for Scene Change in H.264/AVC (장면전환에 효율적인 H.264/AVC 비트율 제어 기법)

  • Son, Nam-Rye;Shin, Yoon-Jeong;Lee, Guee-Sang
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.44 no.1
    • /
    • pp.26-39
    • /
    • 2007
  • In recent years, rate control is an important technique in real time video communication applications using H.264/AVC. Many existing rate control algorithms employ the quadratic rate-distortion model, which is determine the target bits for each P frame. In this paper, a new rate control algorithm for transmission of H.264/AVC video bit stream through CBR(Constant Bit Rate) channel is proposed. The proposed algorithm predicts an adaptive QP(Quantization Parameter) for improving video distortion, due to high motion and abruptly scene change, which target bit rate and MAD(Mean of Absolute Difference) for current frame considering image complexity variance between previous and current frames. Additionally, it uses frame skip technique to maintain bit stream within a manageable range and protect buffer from overflow or underflow. Experimental results show that the proposed method gives a quality improvement of about 0.5dB when compared to previous rate control algorithm. Also our proposed algorithm encodes the video sequences with less frame skipping compared to the existing rate control for H.264/AVC.

Implementation of Variable Threshold Dual Rate ADPCM Speech CODEC Considering the Background Noise (배경잡음을 고려한 가변임계값 Dual Rate ADPCM 음성 CODEC 구현)

  • Yang, Jae-Seok;Han, Kyong-Ho
    • Proceedings of the KIEE Conference
    • /
    • 2000.07d
    • /
    • pp.3166-3168
    • /
    • 2000
  • This paper proposed variable threshold dual rate ADPCM coding method which is modified from the standard ADPCM of ITU G.726 for speech quality improvement. The speech quality of variable threshold dual rate ADPCM is better than single rate ADPCM at noisy environment without increasing the complexity by using ZCR(Zero Crossing Rate). In this case, ZCR is used to divide input signal samples into two categories(noisy & speech). The samples with higher ZCR is categorized as the noisy region and the samples with lower ZCR is categorized as the speech region. Noisy region uses higher threshold value to be compressed by 16Kbps for reduced bit rates and the speech region uses lower threshold value to be compressed by 40Kbps for improved speech quality. Comparing with the conventional ADPCM, which adapts the fixed coding rate. the proposed variable threshold dual rate ADPCM coding method improves noise character without increasing the bit rate. For real time applications, ZCR calculation was considered as a simple method to obtain the background noise information for preprocess of speech analysis such as FFT and the experiment showed that the simple calculation of ZCR can be used without complexity increase. Dual rate ADPCM can decrease the amount of transferred data efficiently without increasing complexity nor reducing speech quality. Therefore result of this paper can be applied for real-time speech application such as the internet phone or VoIP.

  • PDF

Performance Evaluation of Bit Error Resilience for Pixel-domain Wyner-Ziv Video Codec with Frame Difference Residual Signal (화면 간 차이 신호에 대한 화소 영역 위너-지브 비디오 코덱의 비트 에러 내성 성능 평가)

  • Kim, Jin-Soo
    • The Journal of the Korea Contents Association
    • /
    • v.12 no.8
    • /
    • pp.20-28
    • /
    • 2012
  • DVC(Distributed Video Coding) technique is a new paradigm, which is based on the Slepian-Wolf and Wyner-Ziv theorems. DVC offers not only flexible partitioning of the complexity between the encoder and decoder, but also robustness to channel errors due to intrinsic joint source-channel coding. Many conventional research works have been focused on the light video encoder and its rate-distortion performance improvement. However, in this paper, we propose a new DVC codec which is effectively applicable for error-prone environment. The proposed method adopts a quantiser without dead-zone and symmetric Gray code around zero value. Through computer simulations, the proposed method is evaluated by the bit errors position as well as the number of burst bit errors. Additionally, it is shown that the maximum and minimum transmission rate for the given application can be linearly determined by the number of bit errors.

Symbol Synchronization Technique using Bit Decision Window for Non-Coherent IR-UWB Systems (Bit Decision 윈도우를 이용한 Noncoherent IR-UWB 수신기의 심벌 동기에 관한 연구)

  • Lee, Soon-Woo;Park, Young-Jin;Kim, Kwan-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.44 no.2
    • /
    • pp.15-21
    • /
    • 2007
  • In this paper, we propose a technique of a practical symbol acquisition and tracking using a low complex ADC and simple digital circuits for noncoherent asynchronous impulse-radio-based Ultra Wideband (IR-UWB) receiver based on energy detection. Compared to previous approaches of detecting an exact acquisition time that require much hardware resource, the proposed technique is to detect the target symbol by finding the symbol acquisition interval per symbol with a target symbo, thus the complexity of the complete signal processing and power consumption by ADC are reduced. To do this, we define the bit decision window (BDW) and analyze the relation between SNR, hardware resource, size of BDW and BER(Bit Error Rate). Using the results, the optimum BDW size for the minimum BER with limited hardware resource is selected. The proposed synchronization technique is verified with an aid of a simulator programmed by considering practical impulse channels.

Target bit allocation algorithm for generation of high quality static test stream (고화질 정지화 테스트 스트림의 생성을 위한 목표비트 할당 알고리즘)

  • Lee Gwang soon;Han Chan ho;Jang Soo wook;Kim Eun su;Sohng Kyu ik
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.30 no.3C
    • /
    • pp.147-152
    • /
    • 2005
  • In this paper, we proposed a method for compressing the static video test patterns in high quality to test the picture quality in DTV. In our method, we use the fact that the generated bits and average quantization value have almost identical distribution characteristics per each GOP and we propose a new target bit allocation method suitable for compressing the static test pattern while the target bit allocation method in MPEG-2 TM5 is suitable for the moving picture. The proposed target bit allocation method is to maintain the high quality video continuously by using the normalized complexities which are updated or maintained by means of picture qualities at each GOP. Experiment result showed that the test pattern stream encoded by MPEG-2 software with the proposed algorithm had a stable bit rate and good video quality during the decoding process.

Design of a 7-bit 2GSPS Folding/Interpolation A/D Converter with a Self-Calibrated Vector Generator (자체보정 벡터 발생기를 이용한 7-bit 2GSPS A/D Converter의 설계)

  • Kim, Seung-Hun;Kim, Dae-Yun;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.48 no.4
    • /
    • pp.14-23
    • /
    • 2011
  • In this paper, a 7-bit 2GSPS folding/interpolation A/D Converter(ADC) with a Self-Calibrated Vector Generator is proposed. The ADC structure is based on a folding/interpolation architecture whose folding/interpolation rate is 4 and 8, respectively. A cascaded preprocessing block is not only used in order to drive the high input signal frequency, but the resistive interpolation is also used to reduce the power consumption. Based on a novel self-calibrated vector generator, further, offset errors due to device mismatch, parasitic resistors. and parasitic capacitance can be reduced. The chip has been fabricated with a 1.2V 0.13um 1-poly 7-metal CMOS technology. The effective chip area including the calibration circuit is 2.5$mm^2$. SNDR is about 39.49dB when the input frequency is 9MHz at 2GHz sampling frequency. The SNDR is improved by 3dB with the calibration circuit.