• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.22 no.1
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• pp.34-40
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• 1986

This paper deals with a new bit conversion method. When 12 bit AID converter is adapted to 16 bit micro-computer, complicated data aquisition method is not necessary to acquire the AID converted data into memory of computer. However, when the 12 bit AID converter is adapted to the 8 bit micro-computer 12 bit data should be divided into 4 bit data and 8 bit data. Therefore the old data-dividing method made 4 bitl2byte of memory space wasted. On the contrary, using the new bit conversion method suggested in this paper the two of 12 bit data are converted into 3 byte of data without extending the AID conversion time.

• Journal of the Korea Society of Computer and Information
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• v.23 no.8
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• pp.75-84
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• 2018

In this research, a bit correction technique of data hiding method in timestamp of MFT entry in NTFS file system is proposed. This method is proposed in two ways, depending on the number of bytes of data to hide. A basic data hiding method using a bit correction technique to solve the problems of the conventional 2-byte technique is proposed. In order to increase the capacity of the data, a 3-byte data hiding method using an extended bit correction technique is proposed. The data hiding method in the timestamps is based on the fact that is not revealed in the Windows explorer window and the command prompt window even if any data is hidden in the timestamp area of less than one second. It is shown that the validity of the proposed method through the experimental two cases of the basic data hiding method by the bit correction method and the 3-byte data hiding method by the extended bit correction method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.5
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• pp.353-363
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• 1990

This paper analyzes effect of Data Bit Jitter(DBJ) on the Bit Slip Rate(BSR) of the receiver Data Tracking Loop(DTL). In particular, we point out the characteristic jitter parameters that can be used to estimate the BSR performance for the low frequency parts respectively. We also propose a new format for the DBJ specification, which is more sophisticated than the conventional method but is believed to be more practical and accurate in predicting DBJ effect on the receiver BSR performance. In the proposed method, receive dependent parameters are identified and weighting between different parts of jitter spectrum are properly considered.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.6
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• pp.821-828
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• 1990

A forward error correction (FEC) technique is presented for speech data in 16 Kbps digital mobile communications. 14Kbps SBC-APCM(AQB) and QPSK are used as speech coding and modulation techniques, respectively. Because each bit in a speech data block had different importance, applying FEC to speech data bit-selectively in more effective than applying FEC to all speech data equally. To select bits in a speech data block to be protected by FEC the bit error sensitivity of each bit is computed. For a few BCH and Reed-Solomon codes used as bit-selective FEC the performance of the coding technique is computed.

• Analytical Science and Technology
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• v.5 no.3
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• pp.295-301
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• 1992

A versatile data acquisition and control adaptor for IBM personal computers has been developed. The data acquisition and control adaptor developed contains major components necessary for computerized data acquisition and control instrumentaions. Up to 4 differential analog signals can be acquired through a choice of dual 12-bit analog-to digital converters depending on the experimental requirements. Also, dual 12-bit digital-to-analog converters, three 16-bit programmable most computerized laboratory data acquisition and control instrumentation. The design principle and its applications are described.

• ETRI Journal
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• v.24 no.6
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• pp.462-464
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• 2002

This paper presents a serial interface circuit that permits selection of the amount of data converted from serial-to-parallel and parallel-to-serial and overcomes the disadvantages of the conventional serial input/output interface. Based on the selected data length operating mode, 8 bit or 16 bit serial-to-parallel and 8 bit or 16 bit parallel-to-serial conversion takes place in data blocks of the selected data length.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.4
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• pp.209-216
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• 1996

In this paper, we propose a learning method of multi-layer perceptrons (MLPs) with 8-bit data precision. The suggested method uses the cross-entropy cost function to remove the slope term of error signal in output layer. To decrease the possibility of overflows, we use 16-bit weighted sum results into the 8-bit data with appropriate range. In the forwared propagation, the range for bit-conversion is determined using the saturation property of sigmoid function. In the backwared propagation, the range for bit-conversion is derived using the probability density function of back-propagated signal. In a simulation study to classify hadwritten digits in the CEDAR database, our method shows similar generalization performance to the error back-propagation learning with 16-bit precision.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.3
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• pp.197-212
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• 1990

This paper present a new design concept of a single chip 16-bit data path using the concept of modular design, the whole system is divided into several blocks which can be operated as an independent system itself. Making the internal blocks can act as a subsystem, it is possible to shorten design turn-around time, to be redesigned effectively, and to optimize the system performance. The designed system is data path. The data path is to manipulate 16-bit integer data. It is composed of aritmetic logic unit, register file, barrel shifter and bus circuit. The widths and lengths of gate in the circuit were determined using SPICE2. The results of circuit simulation were in good agreement with expected circuit characteristics.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.1
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• pp.104-110
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• 2006

The advantage of the DSM which employ multi-bit quantizer is the increased SNR at the modulator's output. Typically 6 dB improvement is effected for every one additional bit. But multi-bit quantizer evidently requires multi-bit DAC in the feedback loop. The integral linearity error of the feedback DAC has direct impact upon the system performance and degraded SNR of the system. In order to mitigate the negative impact the DAC has on the system performance, many DEM(Dynamic Element Matching) schemes has been proposed. Among the proposed schemes, four schemes(DER,CLA,ILA,DWA) are explained and its performance has been compared. DWA(Data Weighted Averaging) method shows the best performance of the all.

• Journal of the Korea Society of Computer and Information
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• v.24 no.8
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• pp.137-142
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• 2019

This paper proposed bitmap based spatial data transmission scheme in need of rapid transmission through network in mobile environment that use and creation of data are frequently happen. Former researches that used clustering algorithms, focused on providing service using spatial data can cause delay since it doesn't consider the transmission speed. This paper guaranteed rapid service for user by convert spatial data to bit, leads to more transmission of bit of MTU, the maximum transmission unit. In the experiment, we compared arithmetically default data composed of 16 byte and spatial data converted to bitmap and for simulation, we created virtual data and compared its network transmission speed and conversion time. Virtual data created as standard normal distribution and skewed distribution to compare difference of reading time. The experiment showed that converted bitmap and network transmission are 2.5 and 8 times faster for each.