• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.386-389
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• 2003

본 논문에서는 Bluetooth applications를 위한 Bipolar Transistor low noise amplifier (LNA)를 설계하였다. 설계된 LNA는 2.4GHz에서 14.31[dB]의 Gain과 1.59[dB]의 NF를 보였다. 또한 S11은 -13.5[dB], S22는 -21.4[dB]의 양호한 값은 보였다.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.47-50
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• 2000

DC Gummel-Poon SPICE model parameter extraction program has been implemented. This program extracts the parameters from measured data using Levenberg-Marquardt algorithm. Measured data consist of forward and reverse Gummel plot, forward and reverse output characteristics and RE and RC measurements.

• Proceedings of the Korean Vacuum Society Conference
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• 2007.08a
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• pp.338-338
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• 2007

• ETRI Journal
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• v.7 no.4
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• pp.11-14
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• 1985

A polysilicon self-aligned bipolar n-p-n transistor structure is described, which can be used in high speed and high packing density LSI circuits The emitter of this transistor is separated less than $0.4\mum$ with base contact by polysilicon self-align technology. Through all the process, the active region of this device is not damaged. therefore a high performance device is obtained. Using the transistor with $3.0\mum$ design rules, a CML ring oscillator has per-gate minimum propagation delay time of 400 ps at 2.7 mW power consumption condition.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2287-2290
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• 2003

The electrical characteristics of power devices such as BJT (Bipolar Junction Transistor), and MOSFET (Metal Oxide Field Effect Transistor), etc, are altered due to impinging photon radiation and temperature in the nuclear or the space environment. In this paper, BJT and MOSFET are the two devices subjected to ${\gamma}$ radiation. In the case of BJT, the current gain (${\beta}$) and the collector to Emiter breakdown voltage ($V_{CEO}$) are the two main parameters considered. When it was subjected to ${\gamma}$ rays, the ${\beta}$ decreases as the dose level increases, whereas, $V_{CEO}$ gradually increases as the dose level increases. In the case of MOSFET, the threshold voltage is decreasing as the dose level increases. Here it has been observed the decent rate is an increasing function of the threshold voltage. The on-resistance does not change with respect to the dose. Both the devices recover back the original specification after the annealing is finished. No permanent damage has been occurred.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.52 no.2
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• pp.74-79
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• 2003

The method of the analysis of the base Gummel number of the BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of NPN BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data and the transistor saturation current of PNP BJT shows an averaged relative error of 9.2% compared with the measured data

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.359-363
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• 2011

To integrate the sensor driver and logic circuits, fabricating down scaled transistors has been main issue. At this research, short channel effects were analyzed after n channel polycrystalline silicon thin film transistor was fabricated at high temperature. As a result, on current, on/off current ratio and transconductance were increased but threshold voltage, electron mobility and s-slope were reduced with a decrease of channel length. When carriers that develop at grain boundary in activated polycrystalline silicon have no gate biased, on current was increased with punch through by drain current. Also, due to BJT effect (parallel bipolar effect) that developed under region of channel by increase of gate voltage on current was rapidly increased.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.198-208
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• 1995

BiCMOS circuit consist of CMOS part which constructs logic function, and bipolar part which drives output load. Test to detect stuck-open faults in BiCMOS circuit is important, since these faults do sequential behavior and are represented as transition faults. In this paper, proposes a method for efficiently detecting transistor stuck-open faults in BiCMOS circuit by transforming them into slow-to=rise transition and slow-to-fall transition. In proposed method, BiCMOS circuit is transformed into equivalent gate-level circuit by dividing it into pull-up part which make output 1, and pull-down part which make output 0. Stuck-open faults in transistor are modelled as transition fault in input line of gate level circuit which is transformed from given circuit. Faults are detceted by using pull-up part gate level circuit when expected value is '01', or using pull-down part gate level circuit when expected value is '10'. By this method, transistor stuck-open faults in BiCMOS circuit are easily detected using conventional gate level test generation algorithm for transition fault.

• ETRI Journal
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• v.27 no.1
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• pp.75-80
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• 2005

This paper addresses a fully-integrated low phase noise X-band oscillator fabricated using a carbon-doped InGaP heterojunction bipolar transistor (HBT) GaAs process with a cutoff frequency of 53.2 GHz and maximum oscillation frequency of 70 GHz. The oscillator circuit consists of a negative resistance generating circuit with a base inductor, a resonating emitter circuit with a microstrip line, and a buffering resistive collector circuit with a tuning diode. The oscillator exhibits 4.33 dBm output power and achieves -127.8 dBc/Hz phase noise at 100 kHz away from a 10.39 GHz oscillating frequency, which benchmarks the lowest reported phase noise achieved for a monolithic X-band oscillator. The oscillator draws a 36 mA current from a 6.19 V supply with 47.1 MHz of frequency tuning range using a 4 V change. It occupies a $0.8mm{\times}0.8mm$ die area.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.11
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• pp.683-689
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• 2015

For the formation of $N^+$ doping, the antimony ions are mainly used for the fabrication of a BJT (bipolar junction transistor), CMOS (complementary metal oxide semiconductor), FET (field effect transistor) and BiCMOS (bipolar and complementary metal oxide semiconductor) process integration. Antimony is a heavy element and has relatively a low diffusion coefficient in silicon. Therefore, antimony is preferred as a candidate of ultra shallow junction for n type doping instead of arsenic implantation. Three-dimensional (3D) profiles of antimony are also compared one another from different tilt angles and incident energies under same dimensional conditions. The diffusion effect of antimony showed ORD (oxygen retarded diffusion) after thermal oxidation process. The interfacial effect of a $SiO_2/Si$ is influenced antimony diffusion and showed segregation effects during the oxidation process. The surface sputtering effect of antimony must be considered due to its heavy mass in the case of low energy and high dose conditions. The range of antimony implanted in amorphous and crystalline silicon are compared each other and its data and profiles also showed and explained after thermal annealing under inert $N_2$ gas and dry oxidation.