• Title/Summary/Keyword: binary number

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A Boolean Equivalence Testing Algorithm based on a Derivational Method

  • Moon, Gyo-Sik
    • Journal of Electrical Engineering and information Science
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    • v.2 no.5
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    • pp.1-8
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    • 1997
  • The main purpose of the Boolean equivalence problem is to verify that two Boolean expressions have the same functionality. Simulation has been extensively used as the standard method for the equivalence problem. Obviously, the number of tests required to perform a satisfactory coverage grows exponentially with the number of input variables. However, formal methods as opposed to simulation are getting more attention from the community. We propose a new algorithm called the Cover-Merge Algorithm based on a derivational method using the concept of cover and merge for the equivalence problem and investigate its theoretical aspects. Because of the difficulty of the problem, we emphasize simplification techniques in order to reduce the search space or problem size. Heuristics based on types of merges are developed to speed up the derivation process by allowing simplifications. In comparison with widely used technique called Binary Decision Diagram or BDD, the algorithm proposed outperforms BDD in nearly all cases of input including standard benchmark problems.

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A Study on the Hopfield Network for automatic weapon assignment (자동무장할당을 위한 홉필드망 설계연구)

  • 이양원;강민구;이봉기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.1 no.2
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    • pp.183-191
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    • 1997
  • A neural network-based algorithm for the static weapon-target assignment (WTA) problem is Presented in this paper. An optimal WTA is one which allocates targets to weapon systems such that the total expected leakage value of targets surviving the defense is minimized. The proposed algorithm is based on a Hopfield and Tank's neural network model, and uses K x M processing elements called binary neuron, where M is the number of weapon platforms and K is the number of targets. From the software simulation results of example battle scenarios, it is shown that the proposed method has better performance in convergence speed than other method when the optimal initial values are used.

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On Construction of Binary Number Association Scheme Partially Balanced Block Designs

  • Paik, U.B.
    • Journal of the Korean Statistical Society
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    • v.3 no.2
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    • pp.85-101
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    • 1974
  • In a Balanced Factorial Experiments (BFE) with n factors $F_1, F_2,\cdots,F_n$ at $m_1, m_2,\cdots,m_n$ levels respectively, Shah [15] has considered the following association scheme: the two treatments are the $(P_1, P_2,\cdot,P_n)$th associates, where $p_i=1$ if the ith factor occurs at the same level in both treatments and $p_i=0$ otherwise; $\lambda_{(p_1,p_2,\cdots,p_n)}$ will denote the number of times these treatments occur together in a block. He has showed that a BFE is partially Blanced Incomplete Block(PBIB) design with repsect to the above association scheme. Kurjian and Zelan [6] have proved that factorial designs possessing a Property A (a particular structure for their matrix NN') are factorially balanced.

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An Adaptive Decision-Feedback Equalizer Architecture using RB Complex-Number Filter and chip-set design (RB 복소수 필터를 이용한 적응 결정귀환 등화기 구조 및 칩셋 설계)

  • Kim, Ho Ha;An, Byeong Gyu;Sin, Gyeong Uk
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.12A
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    • pp.2015-2024
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    • 1999
  • Presented in this paper are a new complex-umber filter architecture, which is suitable for an efficient implementation of baseband signal processing of digital communication systems, and a chip-set design of adaptive decision-feedback equalizer (ADFE) employing the proposed structure. The basic concept behind the approach proposed in this paper is to apply redundant binary (RB) arithmetic instead of conventional 2’s complement arithmetic in order to achieve an efficient realization of complex-number multiplication and accumulation. With the proposed way, an N-tap complex-number filter can be realized using 2N RB multipliers and 2N-2 RB adders, and each filter tap has its critical delay of $T_{m.RB}+T_{a.RB}$ (where $T_{m.RB}, T_{a.RB}$are delays of a RB multiplier and a RB adder, respectively), making the filter structure simple, as well as resulting in enhanced speed by means of reduced arithmetic operations. To demonstrate the proposed idea, a prototype ADFE chip-set, FFEM (Feed-Forward Equalizer Module) and DFEM (Decision-Feedback Equalizer Module) that can be cascaded to implement longer filter taps, has been designed. Each module is composed of two complex-number filter taps with their LMS coefficient update circuits, and contains about 26,000 gates. The chip-set was modeled and verified using COSSAP and VHDL, and synthesized using 0.8- μm SOG (Sea-Of-Gate) cell library.

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A Fast Inversion for Low-Complexity System over GF(2 $^{m}$) (경량화 시스템에 적합한 유한체 $GF(2^m)$에서의 고속 역원기)

  • Kim, So-Sun;Chang, Nam-Su;Kim, Chang-Han
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.51-60
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    • 2005
  • The design of efficient cryptosystems is mainly appointed by the efficiency of the underlying finite field arithmetic. Especially, among the basic arithmetic over finite field, the rnultiplicative inversion is the most time consuming operation. In this paper, a fast inversion algerian in finite field $GF(2^m)$ with the standard basis representation is proposed. It is based on the Extended binary gcd algorithm (EBGA). The proposed algorithm executes about $18.8\%\;or\;45.9\%$ less iterations than EBGA or Montgomery inverse algorithm (MIA), respectively. In practical applications where the dimension of the field is large or may vary, systolic array sDucture becomes area-complexity and time-complexity costly or even impractical in previous algorithms. It is not suitable for low-weight and low-power systems, i.e., smartcard, the mobile phone. In this paper, we propose a new hardware architecture to apply an area-efficient and a synchronized inverter on low-complexity systems. It requires the number of addition and reduction operation less than previous architectures for computing the inverses in $GF(2^m)$ furthermore, the proposed inversion is applied over either prime or binary extension fields, more specially $GF(2^m)$ and GF(P) .

8-RANKS OF CLASS GROUPS OF IMAGINARY QUADRATIC NUMBER FIELDS AND THEIR DENSITIES

  • Jung, Hwan-Yup;Yue, Qin
    • Journal of the Korean Mathematical Society
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    • v.48 no.6
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    • pp.1249-1268
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    • 2011
  • For imaginary quadratic number fields F = $\mathbb{Q}(\sqrt{{\varepsilon}p_1{\ldots}p_{t-1}})$, where ${\varepsilon}{\in}${-1,-2} and distinct primes $p_i{\equiv}1$ mod 4, we give condition of 8-ranks of class groups C(F) of F equal to 1 or 2 provided that 4-ranks of C(F) are at most equal to 2. Especially for F = $\mathbb{Q}(\sqrt{{\varepsilon}p_1p_2)$, we compute densities of 8-ranks of C(F) equal to 1 or 2 in all such imaginary quadratic fields F. The results are stated in terms of congruence relation of $p_i$ modulo $2^n$, the quartic residue symbol $(\frac{p_1}{p_2})4$ and binary quadratic forms such as $p_2^{h+(2_{p_1})/4}=x^2-2p_1y^2$, where $h+(2p_1)$ is the narrow class number of $\mathbb{Q}(\sqrt{2p_1})$. The results are also very useful for numerical computations.

A Multi-objective Placement of Phasor Measurement Units Considering Observability and Measurement Redundancy using Firefly Algorithm

  • Arul jeyaraj, K.;Rajasekaran, V.;Nandha kumar, S.K.;Chandrasekaran, K.
    • Journal of Electrical Engineering and Technology
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    • v.10 no.2
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    • pp.474-486
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    • 2015
  • This paper proposes a multi-objective optimal placement method of Phasor Measurement Units (PMUs) in large electric transmission systems. It is proposed for minimizing the number of PMUs for complete system observability and maximizing measurement redundancy of the buses, simultaneously. The measurement redundancy of the bus indicates that number of times a bus is able to monitor more than once by PMUs set. A high level of measurement redundancy can maximize the system observability and it is required for a reliable power system state estimation. Therefore, simultaneous optimizations of the two conflicting objectives are performed using a binary coded firefly algorithm. The complete observability of the power system is first prepared and then, single line loss contingency condition is added to the main model. The practical measurement limitation of PMUs is also considered. The efficiency of the proposed method is validated on IEEE 14, 30, 57 and 118 bus test systems and a real and large- scale Polish 2383 bus system. The valuable approach of firefly algorithm is demonstrated in finding the optimal number of PMUs and their locations by comparing its performance with earlier works.

The Performance Improvement of Face Recognition Using Multi-Class SVMs (다중 클래스 SVMs를 이용한 얼굴 인식의 성능 개선)

  • 박성욱;박종욱
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.6
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    • pp.43-49
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    • 2004
  • The classification time required by conventional multi-class SVMs(Support Vector Machines) greatly increases as the number of pattern classes increases. This is due to the fact that the needed set of binary class SVMs gets quite large. In this paper, we propose a method to reduce the number of classes by using nearest neighbor rule (NNR) in the principle component analysis and linear discriminant analysis (PCA+LDA) feature subspace. The proposed method reduces the number of face classes by selecting a few classes closest to the test data projected in the PCA+LDA feature subspace. Results of experiment show that our proposed method has a lower error rate than nearest neighbor classification (NNC) method. Though our error rate is comparable to the conventional multi-class SVMs, the classification process of our method is much faster.

Shift-and-Add Multiplication Algorithm for Decimal System (십진수의 자리이동-덧셈 곱셈법)

  • Lee, Sang-Un
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.2
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    • pp.121-126
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    • 2014
  • The problem of finding the fastest algorithm for multiplication of two large n-digit decimal numbers remains unsolved in the field of mathematics and computer science. To this problem so far two algorithms - Karatsuba and Toom-kook - have been proposed to shorten the number of multiplication. In the complete opposite of shorten the number of multiplication method, this paper therefore proposes an efficient multiplication algorithm using additions completely. The proposed algorithm totally applies shift-and-add algorithm of binary system to large digits of decimal number multiplication for example of RSA-100 this problem can't perform using computer. This algorithm performs multiplication purely with additions of complexity of $O(n^2)$.

Properties of Merger-Driven Shocks in Clusters of Galaxies

  • Ha, Ji-Hoon;Ryu, Dongsu;Kang, Hyesung
    • The Bulletin of The Korean Astronomical Society
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    • v.43 no.1
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    • pp.35.1-35.1
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    • 2018
  • Shock waves have been observed in the outskirts of galaxy clusters. They are commonly interpreted as being driven by mergers of sub-clumps, so are called "merger shocks". We here report a study of the properties of merger shocks in merging galaxy clusters with cosmological hydrodynamic simulations. As a representative case, we describe the case where sub-clusters with mass ratio ~ 2 go through an almost head-on, binary-like merger. Because of the turbulent nature of hierarchical clustering, shock surfaces are not uniform, but composed of parts with different Mach numbers. As merger shocks expand from the core to the outskirts, the average Mach number, < $M_s$ >, increases. The shocks propagating along the merger axis could be observed as X-ray shocks and/or radio relics. The kinetic energy through the shocks peaks at ~ 1 Gyr after shock launching, or at ~ 1 - 2 Mpc from the core. The most energetic shocks are found to have the kinetic-energy weighted Mach number, < $M_s$ > $_{\phi}{\simeq}2-3$, and the CR-energy weighted Mach number, < $M_s$ > $_{CR}{\simeq}3-4$. We then discuss the observational implications of our results.

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