• Title/Summary/Keyword: binary number

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A study of the hologram which records the interference of light with computer (컴퓨터로 빛의 간섭을 기록하는 홀로그램(CGH)의 특성 연구)

  • Lee, Jeong-Yeong;Jang, Woo-Yeong
    • Journal of Korean Ophthalmic Optics Society
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    • v.10 no.4
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    • pp.305-312
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    • 2005
  • In this thesis, Lohmann's algorithm and FFT (fast Fourier transform) are used to synthesize binary-phase holograms. FFT computing is carried out for the calculation of complex wavefronts of $128{\times}128$ sampling points of an object that is numerically specified. Then using the Lohmann's algorithm, the amplitude and the phase of complex wavefronts are encoded in binary holograms on each sampling points. PC (personal computer) and laser printer are used to plot binary-phase holograms and CGH (computer generated holograms) films are obtained from this plot by photographic reduction. Holographic images of numerically specified objects are reconstructed from the He-Ne laser and the inverse Fourier optics system. We estimate the quality of holographic images according to the sampling number, application of random phase, amplitude clipping and bleaching the CGH film. We derive optimized conditions to reconstruct better holographic images and to reduce the speckle noise. FFT and Lohmann's algorithm are implemented with MS Visual BASIC 6.0 for the programming of binary-phase hologram.

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Embedding Complete Binary Trees into Crossed Cubes (완전이진트리의 교차큐브에 대한 임베딩)

  • Kim, Sook-Yeon
    • Journal of KIISE:Computer Systems and Theory
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    • v.36 no.3
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    • pp.149-157
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    • 2009
  • The crossed cube, a variation of the hypercube, possesses a better topological property than the hypercube in its diameter that is about half of that of the hypercube. It has been known that an N-node complete binary tree is a subgraph of an (N+1)-node crossed cube [P. Kulasinghe and S. Bettayeb, 1995]. However, efficient embedding methods have not been known for the case that the number of nodes of the complete binary tree is greater than that of the crossed cube. In this paper, we show that an N-node complete binary tree can be embedded into an M-node crossed cube with dilation 1 and load factor [N/M], N>M$\geq$2. The dilation and load factor is optimal. Our embedding has a property that the tree nodes on the same level are evenly distributed over the crossed cube nodes. The property is especially useful when tree-structured algorithms are processed on a crossed cube in a level-by-level way.

Study on Performance of Double Binary Turbo Code for Power Line Communication Systems Base on OFDM (OFDM 기반의 전력선 통신 시스템에서 이중 이진 터보 부호 성능 연구)

  • Kim, Jin-Young;Cha, Jae-Sang;Kim, Seong-Kweon;Lee, Jong-Joo;Kim, Jae-Hyun;Lee, Chong-Hoon;Kim, Eun-Cheol
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.9 no.3
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    • pp.193-199
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    • 2009
  • Powerline communications (PLC) technology has been discussed and analyzed as a highly potential candidate of wireline access network solutions. In this paper, performance of double binary turbo coded orthogonal frequency division multiplexing (OFDM) system is analyzed and simulated in power line communications channel. In order to make power line channel environments, Bernoulli-Gaussian noise is considered. The performance is evaluated in terms of bit error probability. From the simulation results, it is demonstrated that the double binary turbo coding scheme offers considerable coding gain with reasonable encoding complexity. It is also shown that the system performance can be substantially improved by increasing the number of iterations.

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Four-valued Hybrid FFT processor design using current mode CMOS (전류 모드 CMOS를 이용한 4치 Hybrid FFT 연산기 설계)

  • 서명웅;송홍복
    • Journal of the Korea Computer Industry Society
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    • v.3 no.1
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    • pp.57-66
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    • 2002
  • In this study, Multi-Values Logic processor was designed using the basic circuit of the electric current mode CMOS. First of all, binary FFT(Fast Fourier Transform) was extended and high-speed Multi-Valued Logic processor was constructed using a multi-valued logic circuit. Compared with the existing two-valued FFT, the FFT operation can reduce the number of transistors significantly and show the simplicity of the circuit. Moreover, for the construction of amount was used inside the FFT circuit with the set of redundant numbers like [0,1,2,3]. As a result, the defects in lines were reduced and it turned out to be effective in the aspect of normality an regularity when it was used designing VLSI(Very Large Scale Integration). To multiply FFT, the time and size of the operation was used as LUT(Look Up Table) Finally, for the compatibility with the binary system, multiple-valued hybrid-type FFT processor was proposed and designed using binary-four valued encoder, four-binary valued decoder, and the electric current mode CMOS circuit.

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An Optimization Model for Minimizing the Number of Rehandles at Container Yard (컨테이너 재처리 최소화를 위한 최적화 모형)

  • Kim, Kwang-Tae;Kim, Kyung-Min;Lee, Tae-Yun;Kim, Dong-Hee
    • Proceedings of the KSR Conference
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    • 2011.10a
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    • pp.1246-1250
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    • 2011
  • This paper considers the container storage problem determining storage position of inbound containers in a container yard at a rail freight terminal. The objective of the problem is to minimize the total number of rehandles when storing/retrieving containers onto/from stacks in the yard. Rehandle implies the temporary removal from and placement back onto the stack to retrieval a target container. In order to solve the problem, we formulate the problem as a binary integer program.

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Random Access Method of the Wibro System

  • Lee, Kang-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.1A
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    • pp.49-57
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    • 2011
  • Random access method for Wibro system is proposed using the Bayesian Technique, which can estimate the number of bandwidth request messages in a frame only based on the number of successful slots. The performance measures such as the maximum average throughput, the mean delay time and the collision ratio are investigated to evaluate the performance of the proposed method. The proposed method shows better performance than the binary exponential backoff algorithm used currently.

A Generalized Coding Algorithm for m Input Radix p Shadow-Casting Optical Logic Gate (다중입력 Shawdow-Casting광 논리게이트를 위한 코딩방식의 일반화)

  • 최도형;권원현;박한규
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.8
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    • pp.992-997
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    • 1988
  • A generalized coding algorithm for multiple inputs multiple-valued logic gate based on shadow-casting is proposed. Proposed algorithm can minimize the useless pixels in case the number of inputs is not 2N (N is a natural number). A detailed analysis of advantages of proposed algorithm is presented and its effectiveness is demonstrated in case of three input binary system using inputs of 8*8 data.

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A Study on Sorting in A Computer Using The Binary Multi-level Multi-access Protocol

  • Jung Chang-Duk
    • Proceedings of the Korea Inteligent Information System Society Conference
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    • 2006.06a
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    • pp.303-310
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    • 2006
  • The sorting algorithms have been developed to take advantage of distributed computers. But the speedup of parallel sorting algorithms decrease rapidly with increased number of processors due to parallel processing overhead such as context switching time and inter-processor communication cost. In this paper, we propose a parallel sorting method which provides linear speedup of an optimal serial algorithm for a system with a large number of processors. This algorithm may even provide superlinear speedup for a practical system. The algorithm takes advantage of an interconnection network properties and its protocol.

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BF Gray Quadtree : Efficient Image Representation Method (Breadth First Gray Quadtree:화상의 효율적 표현법)

  • Lee, Geuk;Lee, Min-Gyu;Hwang, Hee-Yeung;Lee, Jung-Won
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.39 no.5
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    • pp.494-499
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    • 1990
  • A new compact hierarchical representation method image is proposed. This method represents a binary image with the set of decimal numbers. Each decimal number represents the pattern of nonterminal node(gray node) in the quadtree. This pattern implies the combination of its four child nodes. The total number of gray nodes is one third of that terminal nodes. We show that gray tree method is efficient comparing with others which have been studied.

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A NEW UPPER BOUND FOR SINGLE ERROR-CORRECTING CODES

  • Kim, Jun-Kyo
    • Bulletin of the Korean Mathematical Society
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    • v.38 no.4
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    • pp.797-801
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    • 2001
  • The purpose of this paper is to give an upper bound for A[n,4], the maximum number of codewords in a binary code of word length n with minimum distance 4 between codewords. We have improved upper bound for A[12k+11,4]. In this correspondence we prove $A[23,4]\leq173716$.

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