• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.215.2-215.2
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• 2015

We fabricated dual active layer (DAL) thin film transistors (TFTs) with indium tin zinc oxide (ITZO) and indium gallium zinc oxide (IGZO) thin film layers using solution process. The ITZO and IGZO layer were used as the front and back channel, respectively. In order to investigate the bias stress stability of ITZO SAL (single active layer) and ITZO/IGZO DAL TFT, a gate bias stress of 10 V was applied for 1500 s under the dark condition. The SAL TFT composed of ITZO layer shows a poor positive bias stability of ${\delta}VTH$ of 13.7 V, whereas ${\delta}VTH$ of ITZO/IGZO DAL TFT was very small as 2.6 V. In order to find out the evidence of improved bias stress stability, we calculated the total trap density NT near the channel/gate insulator interface. The calculated NT of DAL and SAL TFT were $4.59{\times}10^{11}$ and $2.03{\times}10^{11}cm^{-2}$, respectively. The reason for improved bias stress stability is due to the reduction of defect sites such as pin-hole and pores in the active layer.

• ETRI Journal
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• 제31권1호
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• pp.62-64
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• 2009

We report on the bias stability characteristics of transparent ZnO thin film transistors (TFTs) under visible light illumination. The transfer curve shows virtually no change under positive gate bias stress with light illumination, while it shows dramatic negative shifts under negative gate bias stress. The major mechanism of the bias stability under visible illumination of our ZnO TFTs is thought to be the charge trapping of photo-generated holes at the gate insulator and/or insulator/channel interface.

• 한국전자파학회논문지
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• 제13권9호
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• pp.882-888
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• 2002

본 논문에서는 공정변화와 온도변화에 의한 MMIC의 성능저하를 보상할 수 있는 바이어스 안정화 회로를 제안하였다. 제안된 바이어스 안정화 회로는 기존의 정전류원을 사용하는 바이어스 회로와의 비교를 통하여 그 효과를 검증하였다. 두 구조를 동일한 조건으로 비교하기 위해 하나의 레이아웃에 두 구조를 채택한 증폭기를 동시에 설계 및 제작을 하였다. 공정오차는 세가지 경우 NOM, MIM, MAX로 구분하고 각각에 대해 고주파 특성을 측정하였다. 측정 결과로 정전류원을 가지는 바이어스회로를 채택한 증폭기 의 1.8 GHz에서의 이득변화는 6.4 dB, Ids 변화 7 mA이지만 제안된 바이어스회로를 채택한 증폭기는 이득변화는 2.1 dB, Ids 변화 3 mA로 우수한 특성을 보임을 확인하였다. 따라서, 제안된 바이어스 회로를 적용한 MMIC는 공정상의 변화와 온도 등에 의한 동작점의 변화를 보상하여 고주파특성의 감쇠를 보상할 수 있고 궁극적으로 회로의 수율을 개선할 수 있다. 제작된 회로의 전체크기는 1.2 mm $\times$ 1.4 mm이다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.252-253
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• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1424-1425
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• 2011

비절질 IGZO TFT를 제작하여 양의 DC 및 AC에 대한 bias stability를 측정하였다. 소자특성이 상당부분 양의 방향으로 움직여 전류가 감소하였다. 따라서 기존의 Shift-Register는 양의 스트레스 전압을 지속적으로 받기 때문에 회로가 제대로 동작하지 않을 수 있다. 따라서 우리는 양의 스트레스 전압을 받지않는 새로운 Shift-register를 고안하고 SPICE 시뮬레이션을 통하여 안정한 출력을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.204.1-204.1
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• 2015

We studied the electrical properties and gate bias stress (GBS) stability of thin film transistors (TFTs) with multi-stacked InZnO layers. The InZnO TFTs were fabricated via solution process and the In:Zn molar ratio was 1:1. As the number of InZnO layers was increased, the mobility and the subthreshold swing (S.S) were improved, and the threshold voltage of TFT was reduced. The TFT with three-layered InZnO showed high mobility of $21.2cm^2/Vs$ and S.S of 0.54 V/decade compared the single-layered InZnO TFT with $4.6cm^2/Vs$ and 0.71 V/decade. The three-layered InZnO TFTs were relatively unstable under negative bias stress (NBS), but showed good stability under positive bias stress (PBS).

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권2호
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• pp.87-97
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• 2013

Negative bias temperature instability (NBTI) and positive bias temperature instability (PBTI) are critical circuit reliability issues in highly scaled CMOS technologies. In this paper, we analyze the impacts of NBTI and PBTI on SRAM $V_{MIN}$, and present a design solution for mitigating the impact of NBTI and PBTI on SRAM $V_{MIN}$. Two different types of SRAM $V_{MIN}$ (SNM-limited $V_{MIN}$ and time-limited $V_{MIN}$) are explained. Simulation results show that SNM-limited $V_{MIN}$ is more sensitive to NBTI while time-limited $V_{MIN}$ is more prone to suffer from PBTI effect. The proposed NBTI/PBTI-aware control of wordline pulse width and woldline voltage improves cell stability, and mitigates the $V_{MIN}$ degradation induced by NBTI/PBTI.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1455-1458
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• 2008

Amorphous silicon (a-Si:H) thin-film transistors (TFTs) are fabricated on flexible organic polymer foil substrates. As-fabricated performance, electrical bias-stability at elevated temperatures, electrical response under mechanical flexing, and prolonged mechanical stability of the TFTs are studied. TFTs made on plastic at ultra low process temperatures of $150^{\circ}C$ show initial electrical performance like TFTs made on glass but large gate-bias stress instability. An abnormal saturation of the instability against operation temperature is observed.

• Journal of Power Electronics
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• 제16권5호
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• pp.1650-1660
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• 2016

This paper proposes a compensator to eliminate the DC bias of inductor current. This method utilizes an average-current sensing technique to detect the DC bias of inductor current. A small signal model of the DC bias compensation loop is derived. It is shown that the DC bias has a one-pole relationship with the duty cycle of the left side leading lag. By considering the pole produced by the dual active bridge (DAB) converter and the pole produced by the average-current sensing module, a one-pole-one-zero digital compensation method is given. By using this method, the DC bias is eliminated, and the stability of the compensation loop is ensured. The performance of the proposed compensator is verified with a 1.2-kW DAB converter prototype.

• Journal of Electrochemical Science and Technology
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• 제13권3호
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• pp.369-376
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• 2022

In this study, the stability of an anion exchange membrane water electrolyzer (AEMWE) cell was evaluated in an on-off cycling operation with respect to an applied electric bias, i.e., a current density of 500 mA cm^-2, and an open circuit. The ohmic and polarization resistances of the system were monitored during operation (~800 h) using electrochemical impedance spectra. Specific consideration was given to the ohmic resistance of the cell, especially that of the membrane under on-off cycling conditions, by consistently feeding the cell with KOH solution. Owing to an excess feed solution, a momentary increase in the polarization resistance was observed immediately after the open-circuit. The excess feed solution was mostly recovered by subjecting the cell to the applied electric bias. Stability tests on the AEMWE cell under on-off cycling with continuous feeding even under an open circuit can guarantee long-term stability by avoiding an irreversible increase in ohmic and polarization resistances.