• Title/Summary/Keyword: bandgap engineering

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Growth of Si-Doped β-Ga2O3 Epi-Layer by Metal Organic Chemical Vapor Deposition U sing Diluted SiH4 (유기 금속 화학 증착법(MOCVD)의 희석된 SiH4을 활용한 Si-Doped β-Ga2O3 에피 성장)

  • Hyeong-Yun Kim;Sunjae Kim;Hyeon-U Cheon;Jae-Hyeong Lee;Dae-Woo Jeon;Ji-Hyeon Park
    • Korean Journal of Materials Research
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    • v.33 no.12
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    • pp.525-529
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    • 2023
  • β-Ga2O3 has become the focus of considerable attention as an ultra-wide bandgap semiconductor following the successful development of bulk single crystals using the melt growth method. Accordingly, homoepitaxy studies, where the interface between the substrate and the epilayer is not problematic, have become mainstream and many results have been published. However, because the cost of homo-substrates is high, research is still mainly at the laboratory level and has not yet been scaled up to commercialization. To overcome this problem, many researchers are trying to grow high quality Ga2O3 epilayers on hetero-substrates. We used diluted SiH4 gas to control the doping concentration during the heteroepitaxial growth of β-Ga2O3 on c-plane sapphire using metal organic chemical vapor deposition (MOCVD). Despite the high level of defect density inside the grown β-Ga2O3 epilayer due to the aggregation of random rotated domains, the carrier concentration could be controlled from 1 × 1019 to 1 × 1016 cm-3 by diluting the SiH4 gas concentration. This study indicates that β-Ga2O3 hetero-epitaxy has similar potential to homo-epitaxy and is expected to accelerate the commercialization of β-Ga2O3 applications with the advantage of low substrate cost.

A Integrated Circuit Design of DC-DC Converter for Flat Panel Display (플랫 판넬표시장치용 DC-DC 컨버터 집적회로의 설계)

  • Lee, Jun-Sung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.10
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    • pp.231-238
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    • 2013
  • This paper describes a DC-DC converter IC for Flat Panel Displays. In case of operate LCD devices various type of DC supply voltage is needed. This device can convert DC voltage from 6~14[V] single supply to -5[V], 15[V], 23[V], and 3.3[V] DC supplies. In order to meet current and voltage specification considered different type of DC-DC converter circuits. In this work a negative charge pump DC-DC converter(-5V), a positive charge pump DC-DC converter(15V), a switching Type Boost DC-DC converter(23V) and a buck DC-DC converter(3.3V). And a oscillator, a thermal shut down circuit, level shift circuits, a bandgap reference circuits are designed. This device has been designed in a 0.35[${\mu}m$] triple-well, double poly, double metal 30[V] CMOS process. The designed circuit is simulated and this one chip product could be applicable for flat panel displays.

The Effect of Surface Defects on the Optical Properties of ZnSe:Eu Quantum Dots (ZnSe:Eu 양자점의 표면결함이 광학특성에 미치는 영향)

  • Jeong, Da-Woon;Park, Ji Young;Seo, Han Wook;Lim, Kyoung-Mook;Seong, Tae-Yeon;Kim, Bum Sung
    • Journal of Powder Materials
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    • v.23 no.5
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    • pp.348-352
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    • 2016
  • Quantum dots (QDs) are capable of controlling the typical emission and absorption wavelengths because of the bandgap widening effect of nanometer-sized particles. These phosphor particles have been used in optical devices, photovoltaic devices, advanced display devices, and several biomedical complexes. In this study, we synthesize ZnSe QDs with controlled surface defects by a heating-up method. The optical properties of the synthesized particles are analyzed using UV-visible and photoluminescence (PL) measurements. Calculations indicate nearly monodisperse particles with a size of about 5.1 nm at $260^{\circ}C$ (full width at half maximum = 27.7 nm). Furthermore, the study results confirm that successful doping is achieved by adding $Eu^{3+}$ preparing the growth phase of the ZnSe:Eu QDs when heating-up method. Further, we investigate the correlation between the surface defects and the luminescent properties of the QDs.

Design of temperature sensing circuit measuring the temperature inside of IC (IC내부 온도 측정이 가능한 온도센서회로 설계)

  • Kang, Byung-jun;Kim, Han-seul;Lee, Min-woo;Son, Sang-hee;Jung, Won-sup
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2012.10a
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    • pp.838-841
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    • 2012
  • To avoid the damage to circuit and performance degradation by temperature changes, temperature sensing circuit applicable to the IC is proposed in this paper. Temperature sensing is executed by PTAT circuit and power saving mode is activated by internal switch if internal temperature is in high. Also, characteristics of current matching are increased by using current mirror and cascode circuits. From the simulation results, this circuit is operating in action mode if input signal is in low. But it immediately goes into power saving mode if output signal is in high. It shows the output voltage of 1V at $75^{\circ}C$ and 1.75V at $125^{\circ}C$ in action mode and near 0 V(0V~ 7uV) in power saving mode.

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Characteristics of the Mg and In co-doped ZnO Thin Films with Various Substrate Temperatures (RF 마그네트론 스퍼터를 이용하여 제작한 MIZO 박막의 특성에 미치는 기판 온도의 영향)

  • Jeon, Kiseok;Jee, Hongsub;Lim, Sangwoo;Jeong, Chaehwan
    • Current Photovoltaic Research
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    • v.4 no.4
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    • pp.150-154
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    • 2016
  • Mg and In co-doped ZnO (MIZO) thin films with transparent conducting characteristics were successfully prepared on glass substrates by RF magnetron sputtering technique. The Influence of different substrate temperature (from RT to $400^{\circ}C$) on the structural, morphological, electrical, and optical properties of MIZO thin films were investigated. The MIZO thin film prepared at the substrate temperature of $350^{\circ}C$ showed the best electrical characteristics in terms of the carrier concentration ($4.24{\times}10^{20}cm^{-3}$), charge carrier mobility ($5.01cm^2V^{-1}S^{-1}$), and a minimum resistivity ($1.24{\times}10^{-4}{\Omega}{\cdot}cm$). The average transmission of MIZO thin films in the visible range was over 80% and the absorption edges of MIZO thin films were very sharp. The bandgap energy of MIZO thin films becomes wider from 3.44 eV to 3.6 eV as the substrate temperature increased from RT to $350^{\circ}C$. However, Band gap energy of MIZO thin film was narrow at substrate temperature of $400^{\circ}C$.

Effects of substrate temperature on the performance of $Cu_2ZnSnSe_4$ thin film solar cells fabricated by co-evaporation technique

  • Jung, Sung-Hun;Ahn, Se-Jin;Yun, Jae-Ho;Gwak, Ji-Hye;Cho, A-Ra;Yoon, Kyung-Hoon;Kim, Dong-Hwan
    • 한국신재생에너지학회:학술대회논문집
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    • 2009.11a
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    • pp.400-400
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    • 2009
  • Despite the success of Cu(In,Ga)$Se_2$ (CIGS) based PV technology now emerging in several industrial initiatives, concerns about the cost of In and Ga are often expressed. It is believed that the cost of those elements will eventually limit the cost reduction of this technology. One candidate to replace CIGS is $Cu_2ZnSnSe_4$ (CZTSe), fabricated by co-evaporation technique. Co-evaporation technique will be one of the best methods to control film composition. This type of absorber derives from the $CuInSe^2$ chalcopyrite structure by substituting half of the indium atoms with zinc and other half with tin. Energy bandgap of this material has been reported to range from 0.8eV for selenide to 1.5eV for the sulfide and large coefficient in the order of $10^{14}cm^{-1}$, which means large possibility of commercial production of the most suitable absorber by using the CZTSe film. In this work, Effects of substrate temperature of $Cu_2ZnSnSe_4$ absorber layer on the performance of thin films solar cells were investigated. We reported on some of the absorber properties and device results.

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0.35㎛ CMOS Low-Voltage Current/Voltage Reference Circuits with Curvature Compensation (곡률보상 기능을 갖는 0.35㎛ CMOS 저전압 기준전류/전압 발생회로)

  • Park, Eun-Young;Choi, Beom-Kwan;Yang, Hee-Jun;Yoon, Eun-Jung;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.527-530
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    • 2016
  • This paper presents curvature-compensated reference circuits operating under low-voltage condition and achieving low-power consumption with $0.35-{\mu}m$ standard CMOS process. The proposed circuit can operate under less than 1-V supply voltage by using MOS transistors operating in weak-inversion region. The simulation results shows a low temperature coefficient by using the proposed curvature compensation technique. It generates a graph-shape temperature characteristic that looks like a sine curve, not a bell-shape characteristic presented in other published BGRs without curvature compensation. The proposed circuits operate with 0.9-V supply voltage. First, the voltage reference circuit consumes 176nW power and the temperature coefficient is $26.4ppm/^{\circ}C$. The current reference circuit is designed to operate with 194.3nW power consumption and $13.3ppm/^{\circ}C$ temperature coefficient.

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Effect of rare earth dopants on the radiation shielding properties of barium tellurite glasses

  • Vani, P.;Vinitha, G.;Sayyed, M.I.;AlShammari, Maha M.;Manikandan, N.
    • Nuclear Engineering and Technology
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    • v.53 no.12
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    • pp.4106-4113
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    • 2021
  • Rare earth doped barium tellurite glasses were synthesised and explored for their radiation shielding applications. All the samples showed good thermal stability with values varying between 101 ℃ and 135 ℃ based on dopants. Structural properties showed the dominance of matrix elements compared to rare earth dopants in forming the bridging and non-bridging atoms in the network. Bandgap values varied between 3.30 and 4.05 eV which was found to be monotonic with respective rare earth dopants indicating their modification effect in the network. Various radiation shielding parameters like linear attenuation coefficient, mean free path and half value layer were calculated and each showed the effect of doping. For all samples, LAC values decreased with increase in energy and is attributed to photoelectric mechanism. Thulium doped glasses showed the highest value of 1.18 cm-1 at 0.245 MeV for 2 mol.% doping, which decreased in the order of erbium, holmium and the base barium tellurite glass, while half value layer and mean free paths showed an opposite trend with least value for 2 mol.% thulium indicating that thulium doped samples are better attenuators compared to undoped and other rare earth doped samples. Studies indicate an increased level of thulium doping in barium tellurite glasses can lead to efficient shielding materials for high energy radiation.

Fabrication of NNO structure NVM and comparison of electrical characteristic (NNO구조의 비활성 메모리 제작과 소자의 전기적 특성 분석)

  • Lee, Won-Baek;Son, Hyuk-Joo;Jung, Sung-Wook;Yi, Jun-Sin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.75-75
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    • 2009
  • 반도체 및 전자기기 산업에 있어 비활성메모리 (NVM)는 중요한 부운을 차지한다. NVM은 디스플레이 분야에 많은 기여를 하고 있으며, 특히 AMOLED에 적용이 가능하여 온도에 따라 변하는 구동 전류, 휘도, color balance에 따른 문제를 해결하는데 큰 역할을 한다. 본 연구는 NNN 구조에서 터널 층을 $SiN_X$ 박막에서 $SiO_XN_Y$ 박막으로 대체하기위한 $SiO_XN_Y$ 박막을 이용한 NNO구조의 NVM에 관한 연구이다. 이로 인하여 보다 얇으면서 우수한 절연 특성을 가지는 박막을 사용함으로써 실리콘 층으로부터 전하의 터널링 효과를 높여 전하 저장 정도를 높이고, 메모리 retention 특성을 향상시키는 터널 박막을 성장 시킬 수 있다. 최적의 NNO 구조의 메모리 소자를 제작하기 위하여 MIS 상태로 다양한 조건의 실험을 진행하였다. 처음으로 블로킹 박막의 두께를 조절하는 실험을 진행하여 최적 두께의 블로킹 박막을 찾았으며, 다음으로 전하 저장 박막의 band gap을 조절하여 최적의 band gap을 갖는 $SiN_X$ 박막을 찾았다. 마지막으로 최적두께의 $SiO_XN_Y$박막을 찾는 실험을 진행하였다. MIS 상태에서의 최적의 NNO 구조를 이용하여 유리 기판 상에 NNO 구조의 NVM 소자를 제작하였다. 제작된 메모리 소자는 문턱전압이 -1.48 V로 낮은 구동전압을 보였으며, I-V의 slope 값 역시 약 0.3 V/decade로 낮은 값을 보인다. 전류 점멸비($I_{ON}/I_{OFF}$)는 약 $5\times10^6$로 무수하였다. $SiN_X$의 band gap을 다양하게 조절하여 band gap 차이에 의한 밴드 저장 방식을 사용하였다. 또한 $SiN_X$은 전하를 전하 포획(trap) 방식으로 저장하기 때문에 본 연구에서의 메모리 소자는 밴드 저장 방식과 전하 포획 방식을 동시에 사용하여 우수한 메모리 특성을 갖게 될 것으로 기대된다. 우수한 비휘발성 메모리 소자를 제작하기 위해 메모리 특성에 많은 영향을 주는 터널 박막과 전하 저장 층을 다양화하여 소자를 제작하였다. 터널 박막은 터널링이 일어나기 쉽도록 최대한 얇으며, 전하 저장 층으로부터 기판으로 전하가 쉽게 빠져나오지 못하도록 절연 특성이 우수한 박막을 사용하였다. 전하 저장 층은 band gap이 작으며 trap 공간이 많은 박막을 사용하였다.

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Fabrication of wide-bandgap β-Cu(In,Ga)3Se5 thin films and their application to solar cells

  • Kim, Ji Hye;Shin, Young Min;Kim, Seung Tae;Kwon, HyukSang;Ahn, Byung Tae
    • Current Photovoltaic Research
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    • v.1 no.1
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    • pp.38-43
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    • 2013
  • $Cu(In,Ga)_3Se_5$ is a candidate material for the top cell of $Cu(In,Ga)Se_2$ tandem cells. This phase is often found at the surface of the $Cu(In,Ga)Se_2$ film during $Cu(In,Ga)Se_2$ cell fabrication, and plays a positive role in $Cu(In,Ga)Se_2$ cell performance. However, the exact properties of the $Cu(In,Ga)_3Se_5$ film have not been extensively studied yet. In this work, $Cu(In,Ga)_3Se_5$ films were fabricated on Mo-coated soda-lime glass substrates by a three-stage co-evaporation process. The Cu content in the film was controlled by varying the deposition time of each stage. X-ray diffraction and Raman spectroscopy analyses showed that, even though the stoichiometric Cu/(In+Ga) ratio is 0.25, $Cu(In,Ga)_3Se_5$ is easily formed in a wide range of Cu content as long as the Cu/(In+Ga) ratio is held below 0.5. The optical band gap of $Cu_{0.3}(In_{0.65}Ga_{0.35})_3Se_5$ composition was found to be 1.35eV. As the Cu/(In+Ga) ratio was decreased further below 0.5, the grain size became smaller and the band gap increased. Unlike the $Cu(In,Ga)Se_2$ solar cell, an external supply of Na with $Na_2S$ deposition further increased the cell efficiency of the $Cu(In,Ga)_3Se_5$ solar cell, indicating that more Na is necessary, in addition to the Na supply from the soda lime glass, to suppress deep level defects in the $Cu(In,Ga)_3Se_5$ film. The cell efficiency of $CdS/Cu(In,Ga)_3Se_5$ was improved from 8.8 to 11.2% by incorporating Na with $Na_2S$ deposition on the CIGS film. The fill factor was significantly improved by the Na incorporation, due to a decrease of deep-level defects.