• 제목/요약/키워드: anisotropic etching

검색결과 172건 처리시간 0.048초

KOH 용액을 이용한 단결정 실리콘의 이방성 식각특성에 관한 연구 (A study on anisotropic etching property of single-crystal silicon using KOH solution)

  • 김환영;천인호;김창교;조남인
    • 한국결정성장학회지
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    • 제7권3호
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    • pp.449-455
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    • 1997
  • KOH 용액을 이용한 단결정 실리콘의 이방성 식각 특성을 조사하였다. n형 (100) 단결정 실리콘 웨이퍼를 시료로 사용하였으며, 식각 비율이 월등히 작은 $SiO_2$층을 실리콘 식각의 마스크로 사용하였다. 실리콘의 식각속도와 식각상태는 KOH 용액의 농도와 온도조건 뿐만 아니라 용액의 균일도, 용액의 교반속도와 교반방향 등에 따라 큰 차이가 발생하였다. 실리콘의 식각 속도는 KOH 농도가 낮아질수록 증가하며, 온도는 높아질수록 증가하는 경향을 보였으며, 20 wt%~50 wt%의 농도 범위와 $50^{\circ}C~105^{\circ}C$의 온도 범위에서 식각속도는 $10\mu \textrm{m}/hr~250\mu\textrm{m}/hr$로서 큰 폭으로 변화하였다. 식각된 표면의 거칠기중 hillock의 발생은 (100)면과 (111)면의 식각 속도 비율이 커질수록 증가함을 알 수 있었다.

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MRF 공정을 이용한 집적형 광 픽업용 대면적 실리콘 미러 제작 (Fabrication of Large Area Si Mirror for Integrated Optical Pickup by using Magnetorheological Finishing)

  • 박성준;이성준;최석문;민병권;이상조
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2005년도 춘계학술대회 논문집
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    • pp.1522-1526
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    • 2005
  • In this study, the fabrication of large area silicon mirror is accomplished by anisotropic etching using MEMS for implementation of integrated optical pickup and the process condition is also established for improving the mirror surface roughness. Until now, few results have been reported about the production of highly stepped $9.74^{\circ}$ off-axis-cut silicon wafer using wet etching. In addition rough surface of the mirror is achieved in case of long etching time. Hence a novel method called magnetorheolocal finishing is introduced to enhancing the surface quality of the mirror plane. Finally, areal peak to valley surface roughness of mirror plane is reduced about 100nm in large area of $mm^2$ and it is applicable to optical pickup using infrared wavelength.

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$N_2H_4-H_2O$용액의 {100} Si에 대한 최적식각조건의 설정과 전기화학적 식각에의 응용 (Establishment of Optimal {100} Si Etching Condition for $N_2H_4-H_2O$ Solutions and Application to Electrochemica Etching)

  • 주병권;이윤호;김병곤;오명환
    • 대한전자공학회논문지
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    • 제26권11호
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    • pp.1686-1690
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    • 1989
  • Using the anisotropic etching characteristics of N2H4-H2O solutions, Si diaphragm was fabricated for the integrated sensors. The optimal composition and temperature of the etching solution in (100) Si etching process was established to be 50mol% N2H4 in H2O at 105\ulcorner\ulcorner for both higher etch rate (=2.6\ulcorner/min) and better surface quality of etched (100) planes. Based on the above optimal etching condition, the electrochemical etch-stop technique was employed to form n-type Si diaphragm having a thickness of 20\ulcorner and the thickness of diapragm could exactly be controlled to 20\ulcorner\ulcorner.

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Microfabrication of Submicron-size Hole on the Silicon Substrate using ICP etching

  • Lee, J.W.;Kim, J.W.;Jung, M.Y.;Kim, D.W.;Park, S.S.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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    • pp.79-79
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    • 1999
  • The varous techniques for fabrication of si or metal tip as a field emission electron source have been reported due to great potential capabilities of flat panel display application. In this report, 240nm thermal oxide was initially grown at the p-type (100) (5-25 ohm-cm) 4 inch Si wafer and 310nm Si3N4 thin layer was deposited using low pressure chemical vapor deposition technique(LPCVD). The 2 micron size dot array was photolithographically patterned. The KOH anisotropic etching of the silicon substrate was utilized to provide V-groove formation. After formation of the V-groove shape, dry oxidation at 100$0^{\circ}C$ for 600 minutes was followed. In this procedure, the orientation dependent oxide growth was performed to have a etch-mask for dry etching. The thicknesses of the grown oxides on the (111) surface and on the (100) etch stop surface were found to be ~330nm and ~90nm, respectively. The reactive ion etching by 100 watt, 9 mtorr, 40 sccm Cl2 feed gas using inductively coupled plasma (ICP) system was performed in order to etch ~90nm SiO layer on the bottom of the etch stop and to etch the Si layer on the bottom. The 300 watt RF power was connected to the substrate in order to supply ~(-500)eV. The negative ion energy would enhance the directional anisotropic etching of the Cl2 RIE. After etching, remaining thickness of the oxide on the (111) was measured to be ~130nm by scanning electron microscopy.

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P-형 실리콘에서 마이크로 와이어 형성에 미치는 마스크 패턴의 영향 (The Effect of Mask Patterns on Microwire Formation in p-type Silicon)

  • 김재현;김강필;류홍근;우성호;서홍석;이정호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.418-418
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    • 2008
  • The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

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The Fabrication of Megasonic Agitated Module(MAM) for the Improved Characteristics of Wet Etching

  • Park, Tae-Gyu;Yang, Sang-Sik;Han, Dong-Chul
    • Journal of Electrical Engineering and Technology
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    • 제3권2호
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    • pp.271-275
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    • 2008
  • The MAM(Megasonic Agitated Module) has been fabricated for improving the characteristics of wet etching. The characteristics of the MAM are investigated during the wet etching with and without megasonic agitation in this paper. The adoption of the MAM has improved the characteristics of wet etching, such as the etch rate, etch uniformity, and surface roughness. Especially, the etching uniformity on the entire wafer was less than ${\pm}1%$ in both cases of Si and glass. Generally, the initial root-mean-square roughness($R_{rms}$) of the single crystal silicon was 0.23nm. Roughnesses of 566nm and 66nm have been achieved with magnetic stirring and ultrasonic agitation, respectively, by some researchers. In this paper, the roughness of the etched Si surface is less than 60 nm. Wet etching of silicon with megasonic agitation can maintain nearly the original surface roughness during etching. The results verified that megasonic agitation is an effective way to improve etching characteristics of the etch rate, etch uniformity, and surface roughness and that the developed micromachining system is suitable for the fabrication of devices with complex structures.

$CF_4$$O_2$혼합가스를 이용한 산화막과 질화막의 선택적 식각에 관한 연구 (Selective etch of silicon nitride, and silicon dioxide upon $O_2$ dilution of $CF_4$ plasmas)

  • 김주민;원태영
    • E2M - 전기 전자와 첨단 소재
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    • 제8권1호
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    • pp.90-94
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    • 1995
  • Reactive Ion Etching(RIE) of Si$_{3}$N$_{4}$ in a CF$_{4}$/O$_{2}$ gas plasma exhibits such good anisotropic etching properties that it is widely employed in current VLSI technology. However, the RIE process can cause serious damage to the silicon surface under the Si$_{3}$N$_{4}$ layer. When an atmospheric pressure chemical vapor deposited(APCVD) SiO$_{2}$ layer is used as a etch-stop material for Si$_{3}$N$_{4}$, it seems inevitable to get a good etch selectivity of Si$_{3}$N$_{4}$ with respect to SiO$_{2}$. Therefore, we have undertaken thorough study of the dependence of the etch rate of Si$_{3}$N$_{4}$ plasmas on $O_{2}$ dilution, RF power, and chamber pressure. The etch selectivity of Si$_{3}$N$_{4}$ with respect to SiO$_{2}$ has been obtained its value of 2.13 at the RF power of 150 W and the pressure of 110 mTorr in CF$_{4}$ gas plasma diluted with 25% $O_{2}$ by flow rate.

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전계방출 및 근접 광센서 응용을 위한 서브 마이크론 aperture의 제작 (Microfabrication of submicron-size hole for potential held emission and near field optical sensor applications)

  • Lee, J.W.;Park, S.S.;Kim, J.W.;M.Y. Jung;Kim, D.W.
    • 한국진공학회지
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    • 제9권2호
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    • pp.99-101
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    • 2000
  • Submicron aperture 제작 기술은 near field optical sensor 또는 liquid metal ion source에 응용될 수 있는 가능성으로 인해 흥미를 모으고 있다. 본 실험에서는 submicron aperture 제작에 대해 기술할 것이다. 먼저 2 $\mu\textrm{m}$크기의 dot array를 광학 리소그라피 방법으로 패턴화하였다. KOH 비등방성 식각 방법으로 V-groove형을 만든 후, $1000^{\circ}C$에서 600분동안 건식 산화작업을 거쳤다. 이 산화과정에서 결정 방향에 따라 산화율이 달라지게 되는데 Si(111)면은 Si(100)면에 비해 산화율이 커서 두꺼운 산화막이 형성되며, 이 막은 연이은 건식식각 과정에서 etch-mask로 활용된다. Reactive ion etching은 ICP (Inductively Coupled Plasma) 장비를 사용하였으며, V-groove의 바닥에 형성된 90nm두께의 SiO$_2$와 그 아래의 Si을 식각하였다. 이 때, 기판에 걸린 negative bias는 $Cl_2$ RIE의 anisotropic etchig 효과를 증대시키는 것 같았으며, SEM촬영 결과 식각 후에 Si(111)면 위에는 약 130 nm정도의 산화층이 잔류하고 있었다. 이렇게 형성된 Si aperture는 향후 NSOM sensor등에 적용될 수 있을 것이다.

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