• The Journal of Korean Institute for Practical Engineering Education
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• v.4 no.2
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• pp.91-97
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• 2012

The automated visual inspection system (machine vision system) for quality assurance is an important factory automation equipment in the manufacturing industries, such as display, semiconductor, etc. The world market of the machine vision components is expected 18 billon dollars in 2015. Therefore, there is a lot of demand for the machine vision engineers. However, there are no technical training courses for machine vision technologies in vocational schools, colleges and universities. In this paper, we propose a technical training program for the machine vision technology. The total time of training is 30 to 60 hours and the training program can operate flexibly by student's major, a priori knowledge and education level.

• The Journal of the Convergence on Culture Technology
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• v.4 no.3
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• pp.287-291
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• 2018

The CNTFET, which is attracting attention as a next-generation semiconductor device, can obtain ballistic or near-ballistic transport at a lower voltage than that of conventional MOSFETs by depositing CNTs between the source and drain of the device. In order to increase the performance of the CNTFET, a large number of CNTs must be deposited at a high density in the CNTFET. Thus, various manufacturing processes to increase the density of the CNTs have been developed. Recently, the Directional Shrinking Transfer Method was developed and showed that the current density of the CNTFET device could be increased up to 150 uA/um. So, this method enhances the possibility of implementing a CNTFET-based integrated circuit. In this paper, we will discuss how to evaluate the performance of the CNTFET device compared to a MOSFET at the circuit level when the CNTFET is fabricated by the Directional Shrinkage Transfer Method.

• Journal of the Korea Society for Simulation
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• v.21 no.2
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• pp.79-90
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• 2012

In this paper, a feature signal extraction method is proposed in order to enhance the low performance of fault detection caused by unbalanced data which denotes the situations when severe disparity exists between the numbers of class instances. Most of the cyclic signals gathered during the process are recognized as normal, while only a few signals are regarded as fault; the majorities of cyclic signals data are unbalanced data. SOM(Self-Organizing Map)-based feature signal extraction method is considered to fix the adverse effects caused by unbalanced data. The weight neurons, mapped to the every node of SOM grid, are extracted as the feature signals of both class data which are used as a reference data set for fault detection. kNN(k-Nearest Neighbor) and SVM(Support Vector Machine) are considered to make fault detection models with comparisons to Hotelling's $T^2$ Control Chart, the most widely used method for fault detection. Experiments are conducted by using simulated process signals which resembles the frequent cyclic signals in semiconductor manufacturing.

• Clean Technology
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• v.29 no.4
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• pp.255-261
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• 2023

Power semiconductors are semiconductors used for power conversion, transformation, distribution, and control. Recently, the global demand for high-voltage power semiconductors is increasing across various industrial fields, and optimization research on high-voltage IGBT components is urgently needed in these industries. For high-voltage IGBT development, setting the resistance value of the wafer and optimizing key unit processes are major variables in the electrical characteristics of the finished chip. Furthermore, the securing process and optimization of the technology to support high breakdown voltage is also important. Etching is a process of transferring the pattern of the mask circuit in the photolithography process to the wafer and removing unnecessary parts at the bottom of the photoresist film. Ion implantation is a process of injecting impurities along with thermal diffusion technology into the wafer substrate during the semiconductor manufacturing process. This process helps achieve a certain conductivity. In this study, dry etching and wet etching were controlled during field ring etching, which is an important process for forming a ring structure that supports the 3.3 kV breakdown voltage of IGBT, in order to analyze four conditions and form a stable body junction depth to secure the breakdown voltage. The field ring ion implantation process was optimized based on the TEG design by dividing it into four conditions. The wet etching 1-step method was advantageous in terms of process and work efficiency, and the ring pattern ion implantation conditions showed a doping concentration of 9.0E13 and an energy of 120 keV. The p-ion implantation conditions were optimized at a doping concentration of 6.5E13 and an energy of 80 keV, and the p+ ion implantation conditions were optimized at a doping concentration of 3.0E15 and an energy of 160 keV.

• Asia pacific journal of information systems
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• v.20 no.3
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• pp.191-204
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• 2010

Recently, the CO2 emission and energy consumption have become critical global issues to decide the future of nations. Especially, the spread of IT products and the increased use of internet and web applications result in the energy consumption and CO2 emission of IT industry though information technologies drive global economic growth. EU, the United States, Japan and other developed countries are using IT related environmental regulations such as WEEE(Waste Electrical and Electronic Equipment), RoHS(Restriction of the use of Certain Hazardous Substance), REACH(Registration, Evaluation, Authorization and Restriction of CHemicals) and EuP(Energy using Product), and have established systematic green business/IT strategies to enhance the competitiveness of IT industry. For example, the Japan government proposed the "Green IT initiative" for being compatible with economic growth and environmental protection. Not only energy saving technologies but energy saving systems have been developed for accomplishing sustainable development. Korea's CO2 emission and energy consumption continuously have grown at comparatively high rates. They are related to its industrial structure depending on high energy-consuming industries such as iron and steel Industry, automotive industry, shipbuilding industry, semiconductor industry, and so on. In particular, export proportion of IT manufacturing is quite high in Korea. For example, the global market share of the semiconductor such as DRAM was about 80% in 2008. Accordingly, Korea needs to establish a systematic strategy to respond to the global environmental regulations and to maintain competitiveness in the IT industry. However, green competitiveness of Korea ranked 11th among 15 major countries and R&D budget for green technology is not large enough to develop energy-saving technologies for infrastructure and value chain of low-carbon society though that grows at high rates. Moreover, there are no concrete action plans in Korea. This research aims to deduce the priorities of the Korean green business/IT strategies to use multi attribute weighted average method. We selected a panel of 19 experts who work at the green business related firms such as HP, IBM, Fujitsu and so on, and selected six assessment indices such as the urgency of the technology development, the technology gap between Korea and the developed countries, the effect of import substitution, the spillover effect of technology, the market growth, and the export potential of the package or stand-alone products by existing literature review. We submitted questionnaires at approximately weekly intervals to them for priorities of the green business/IT strategies. The strategies broadly classify as follows. The first strategy which consists of the green business/IT policy and standardization, process and performance management and IT industry and legislative alignment relates to government's role in the green economy. The second strategy relates to IT to support environment sustainability such as the travel and ways of working management, printer output and recycling, intelligent building, printer rationalization and collaboration and connectivity. The last strategy relates to green IT systems, services and usage such as the data center consolidation and energy management, hardware recycle decommission, server and storage virtualization, device power management, and service supplier management. All the questionnaires were assessed via a five-point Likert scale ranging from "very little" to "very large." Our findings show that the IT to support environment sustainability is prior to the other strategies. In detail, the green business /IT policy and standardization is the most important in the government's role. The strategies of intelligent building and the travel and ways of working management are prior to the others for supporting environment sustainability. Finally, the strategies for the data center consolidation and energy management and server and storage virtualization have the huge influence for green IT systems, services and usage This research results the following implications. The amount of energy consumption and CO2 emissions of IT equipment including electrical business equipment will need to be clearly indicated in order to manage the effect of green business/IT strategy. And it is necessary to develop tools that measure the performance of green business/IT by each step. Additionally, intelligent building could grow up in energy-saving, growth of low carbon and related industries together. It is necessary to expand the affect of virtualization though adjusting and controlling the relationship between the management teams.

• 대한공업교육학회지
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• v.38 no.2
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• pp.267-286
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• 2013

Recently, the advanced company has been sparing no efforts in improving necessary core knowledge and technology to achieve outstanding work performance. In this rapidly changing knowledge-based society, the company has confronted the task of creating a high value-added knowledge. The role of R&D workforce that corresponds to the characteristic and role of knowledge worker is getting more significant. As the life cycle of technical knowledge and skill shortens, in every industry, the technical knowledge and skill have become essential elements for successful business. It is difficult to improve competitiveness of the company without enhancing the competency of individual and organization. As the competency development which is a part of human resource management in the company is being spread now, it is required to focus on the research of determining necessary competency and to analyze the competency of a core organization in the research institute. 'H' is the semiconductor manufacturing company which has a affiliated research institute with its own R&D engineers. Based on focus group interview and job analysis data, vision and necessary competency were confirmed. And to confirm whether the required competency by job is different or not, analysis was performed by dividing members into workers who are in charge of circuit design and design before process development and who are in the process actualization and process development. Also, this research included members' importance awareness of the determined competency. The interview and job analysis were integrated and analyzed after arranging by groups and contents and the analyzed results were resorted after comparative analysis with a competency dictionary of Spencer & Spencer and competency models which are developed from the advanced research. Derived main competencies are: challenge, responsibility, and prediction/responsiveness, planning a new business, achievement -oriented, training, cooperation, self-development, analytic thinking, scheduling, motivation, communication, commercialization of technology, information gathering, professionalism on the job, and professionalism outside of work. The highly required competency for both jobs was 'Professionalism'. 'Attitude', 'Performance Management', 'Teamwork' for workers in charge of circuit design and 'Challenge', 'Training', 'Professionalism on the job' and 'Communication' were recognized to be required competency for those who are in charge of process actualization and process development. With above results, this research has determined the necessary competency that the 'H' company's affiliated research institute needs and found the difference of required competency by job. Also, it has suggested more enthusiastic education methods or various kinds of education by confirming the importance awareness of competency and individual's level of awareness about the competency.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.62-62
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• 2008

As micro-system move toward higher speed and miniaturization, requirements for embedding the passive components into printed circuit boards (PCBs) grow consistently. They should be fabricated in smaller size with maintaining and even improving the overall performance. Miniaturization potential steps from the replacement of surface-mount components and the subsequent reduction of the required wiring-board real estate. Among the embedded passive components, capacitors are most widely studied because they are the major components in terms of size and number. Embedding of passive components such as capacitors into polymer-based PCB is becoming an important strategy for electronics miniaturization, device reliability, and manufacturing cost reduction Now days, the dielectric films deposited directly on the polymer substrate are also studied widely. The processing temperature below $200^{\circ}C$ is required for polymer substrates. For a low temperature deposition, bismuth-based pyrochlore materials are known as promising candidate for capacitor $B_2Mg_{2/3}Nb_{4/3}O_7$ ($B_2MN$) multi layers were deposited on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system at room temperature. The physical and structural properties of them are investigated by SEM, AFM, TEM, XPS. The dielectric properties of MIM structured capacitors were evaluated by impedance analyzer (Agilent HP4194A). The leakage current characteristics of MIM structured capacitor were measured by semiconductor parameter analysis (Agilent HP4145B). 200 nm-thick $B_2MN$ muti layer were deposited at room temperature had capacitance density about $1{\mu}F/cm^2$ at 100kHz, dissipation factor of < 1% and dielectric constant of > 100 at 100kHz.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.39-46
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• 2017

This paper presents the fabrication of ceramic insulation layer on metallic heat spreading substrate, i.e. an insulated metal substrate, for planar type heater. Aluminum alloy substrate is preferred as a heat spreading panel due to its high thermal conductivity, machinability and the light weight for the planar type heater which is used at the thermal treatment process of semiconductor device and display component manufacturing. An insulating layer made of ceramic dielectric film that is stable at high temperature has to be coated on the metallic substrate to form a heating element circuit. Two technical issues are raised at the forming of ceramic insulation layer on the metallic substrate; one is delamination and crack between metal and ceramic interface due to their large differences in thermal expansion coefficient, and the other is electrical breakdown due to intrinsic weakness in dielectric or structural defects. In this work, to overcome those problem, selected metal oxide buffer layers were introduced between metal and ceramic layer for mechanical matching, enhancing the adhesion strength, and multi-coating method was applied to improve the film quality and the dielectric breakdown property.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.1
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• pp.31-39
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• 2014

For mobile application, semiconductor packages are increasingly moving toward high density, miniaturization, lighter and multi-functions. Typical wafer level packages (WLP) is fan-in design, it can not meet high I/O requirement. The fan-out wafer level packages (FOWLPs) with reconfiguration technology have recently emerged as a new WLP technology. In FOWLP, warpage is one of the most critical issues since the thickness of FOWLP is thinner than traditional IC package and warpage of WLP is much larger than the die level package. Warpage affects the throughput and yield of the next manufacturing process as well as wafer handling and fabrication processability. In this study, we investigated the characteristics of warpage and main parameters which affect the warpage deformation of FOWLP using the finite element numerical simulation. In order to minimize the warpage, the characteristics of warpage for various epoxy mold compounds (EMCs) and carrier materials are investigated, and DOE optimization is also performed. In particular, warpage after EMC molding and after carrier detachment process were analyzed respectively. The simulation results indicate that the most influential factor on warpage is CTE of EMC after molding process. EMC material of low CTE and high Tg (glass transition temperature) will reduce the warpage. For carrier material, Alloy42 shows the lowest warpage. Therefore, considering the cost, oxidation and thermal conductivity, Alloy42 or SUS304 is recommend for a carrier material.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.200-200
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• 2010

In recent times, metal oxide semiconductors thin films transistor (TFT), such as zinc and indium based oxide TFTs, have attracted considerable attention because of their several advantageous electrical and optical properties. There are many deposition methods for fabrication of ZnO-based materials such as chemical vapor deposition, RF/DC sputtering and pulsed laser deposition. However, these vacuum process require expensive equipment and result in high manufacturing costs. Also, the methods is difficult to fabricate various multicomponent oxide semiconductor. Recently, several groups report solution processed metal oxide TFTs for low cost and non vacuum process. In this study, we have newly developed solution-processed TFTs based on Ti-related multi-component transparent oxide, i. e., InTiO as the active layer. We propose new multicomponent oxide, Titanium indium oxide(TiInO), to fabricate the high performance TFT through the sol-gel method. We investigated the influence of relative compositions of Ti on the electrical properties. Indium nitrate hydrate [$In(NO^3).xH_2O$] and Titanium isobutoxide [$C_{16}H_{36}O_4Ti$] were dissolved in acetylacetone. Then monoethanolamine (MEA) and acetic acid ($CH_3COOH$) were added to the solution. The molar concentration of indium was kept as 0.1 mol concentration and the amount of Ti was varied according to weighting percent (0, 5, 10%). The complex solutions become clear and homogeneous after stirring for 24 hours. Heavily boron (p+) doped Si wafer with 100nm thermally grown $SiO_2$ serve as the gate and gate dielectric of the TFT, respectively. TiInO thin films were deposited using the sol-gel solution by the spin-coating method. After coating, the films annealed in a tube furnace at $500^{\circ}C$ for 1hour under oxygen ambient. The 5% Ti-doped InO TFT had a field-effect mobility $1.15cm^2/V{\cdot}S$, a threshold voltage of 4.73 V, an on/off current ratio grater than $10^7$, and a subthreshold slop of 0.49 V/dec. The 10% Ti-doped InO TFT had a field-effect mobility $1.03\;cm^2/V{\cdot}S$, a threshold voltage of 1.87 V, an on/off current ration grater than $10^7$, and a subthreshold slop of 0.67 V/dec.