• Proceedings of the Korea Society for Simulation Conference
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• 2002.11a
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• pp.115-121
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• 2002

The growth of semiconductor industry attracted to researchers like design, facility technique and making small size chip areas. But nowadays, cause of technology extension and oversupply and price down, yield improvement is the most important point on growth. This paper describes the computer mode]ing technique as the solutions to analyze the problem, to formalize the semiconductor manufacturing process and to build advanced manufacturing environments. The computer models are built referring an existing 8' wafer production line in Korea.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.21 no.9
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• pp.1-11
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• 2022

Recently, there has been continuous technological development in the semiconductor industry, and semiconductor manufacturing technologies are being advanced and highly integrated. For this reason, ceramic material having excellent heat resistance, wear resistance, and conductivity are used as components in semiconductor manufacturing. Among them, the probe card's space transformer is used as ceramic material to prevent electronic signal noise during the electrical die sorting of semiconductor function testing. However, implementing a bulk-type space transformer with a thickness of 5.6 mm or more is challenging, and thus it is produced in a structure with a stacked ceramic film. The stacked space transformer has low productivity because it is difficult to ensure hole clogging and a precise shape. In this research, an ultrasonic horn is designed to manufacture a bulk-type ceramic space transformer through ultrasonic drilling. Vibration characteristics were analyzed according to the ultrasonic horn, and the natural frequency was measured.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2001.10a
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• pp.298-301
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• 2001

In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.

• Journal of Korean Institute of Industrial Engineers
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• v.38 no.1
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• pp.46-56
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• 2012

The purpose of virtual metrology (VM) in semiconductor manufacturing is to predict every wafer's metrological values based on its process equipment data without an actual metrology. In this paper, we propose novelty detection-based reliability estimation models for VM in order to support flexible utilization of VM results. Because the proposed model can not only estimate the reliability of VM, but also identify suspicious process variables lowering the reliability, quality control actions can be taken selectively based on the reliance level and its causes. Based on the preliminary experimental results with actual semiconductor manufacturing process data, our models can successfully give a high reliance level to the wafers with small prediction errors and a low reliance level to the wafers with large prediction errors. In addition, our proposed model can give more detailed information by identifying the critical process variables and their relative impacts on the low reliability.

• International Journal of Quality Innovation
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• v.6 no.1
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• pp.58-73
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• 2005

The objective of this study is to evaluate the equipment risk before and after SEMI S2-93A implementation, thus providing a guideline for safety improvement. Semiconductor Plant A located in Taiwan's Hsinchu Science Based Industrial Park with 147 manufacturing machines was used for risk assessment. This study was carried out in three steps. First, a preliminary hazard analysis was conducted. A detailed process safety evaluation was conducted (Hazard and Operability Study, HAZOP); and finally, the equipment risk comparison before and after Semiconductor Equipment Manufacturing Instruction (SEMI S2-93A) implementation. The preliminary hazard analysis results showed high risk in 21.77% of the manufacturing machines under risk assessment at Plant A. The largest percentage existed in the Diffusion Department. The machine types specified by the hazardous work site review and inspection according to Article 26 of Labor Inspection Regulation (the machines that use such chemicals as, $SiH_4$, HF, HCL, etc. and that are determined to be highly hazardous through preliminary hazard analysis) were added to the detailed process analysis and evaluation. In the third part of this evaluation, the machines at Plant A used for detailed process safety assessment were divided into two groups based on the manufacturing data before and after 1993. The severity, possibility, and actual accident analysis before and after SEMI S2-93A implementation were compared. The Semiconductor Equipment Manufacturing Instruction (SEMI S2-93A) implementation can reduce the severity and possibility of hazard occurrence.

• Journal of East Asia Management
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• v.3 no.2
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• pp.43-64
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• 2022

Exploring innovations for latecomers to catch up has been a popular concern in industry and academia. Over the last decade, more and more East Asian latecomer firms have moved beyond imitation and are delivering innovative products and services to the market. However, the semiconductor latecomers from China have limited success in catching up with more mature semiconductor firms. Our study examines how semiconductor latecomers to break through the latecomer's dilemma by innovation and achieve catch-up. We use a single-case approach for the Semiconductor Manufacturing International Corporation (SMIC) vertical development process to analysis its innovation path of catching up. The study's results showed that SMIC relied on the government's policy and funding support, and based on the strategic endurance of entrepreneurs, it persisted in technology R&D investment and independent innovation for 20 years. SMIC finally smashed the dilemma of latecomers and successfully achieved catch-up. With these findings, we believe that the path of catching up innovation for semiconductor latecomers should be equipped with independent innovation of technology, strategic leadership of entrepreneurs and support of government policies. As these factors are combined, latecomer firms' position is expected to rise and catch-up will become visible. Our study contributes to some enlightenment on the innovation path for latecomers in China and global semiconductors to achieve their catch-up.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.335-336
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• 2006

Compound semiconductor manufacturing environment also has been emerged as mass customization and open foundry service so integrated manufacturing system is needed. In this study, we design data acquisition system of compound semiconductor fabrication that has monitoring and control of process. The developed DAS is consisted of key-in system inputted by operator and automatic acquisition system by GEM protocol. And we implemented them in the actual compound semiconductor. It is expected that using developed system would offer precise process information to buyer, reduce a lead-time, and obey a due-dates and so on.

• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.55-60
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• 2020

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

• Journal of the Semiconductor & Display Technology
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• v.21 no.2
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• pp.144-149
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• 2022

A cryogenic Mixed Refrigerant Joule-Thomson refrigeration cycle was designed to be applied to the semiconductor etching process with non-flammable constituents. 3-stage cascade refrigerator, single mixed refrigerant Joule-Thomson refrigerator, and 2-stage cascade type mixed refrigerant Joule-Thomson refrigerator are analyzed to figure out the coefficient of performance. Non-flammable mixture of argon(Ar), tetrafluoromethane(R14), trifluoromethane (R23) and octafluoropropane(R218) were utilized to analyze the refrigeration cycle efficiency. The designed refrigeration cycle was adapted to cool down the coolant of HFE7200(Ethoxy-nonafluorobutane, C₄F₉OC₂H₅) with certain constraints. Maximum coefficient of performance of the refrigeration system is obtained as 0.289 for the cooling temperature lower than -100℃. The detailed result of the coefficient of performance according to the mixture composition is discussed in this study.

• Journal of the Korea Safety Management & Science
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• v.15 no.1
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• pp.199-207
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• 2013

Domestic semiconductor industry grew rapidly enough to draw a close attention in a short period less than twenty years. Korea grew to be the third largest semiconductor manufacturing country in the world during the period and has maintained the proud of Koreans even in technological competitiveness. Accordingly, In this study, it was introduced and analyzed 6 sigma method using profits making analysis for increasing Productivity in the semiconductor manufacturing process.