Bottleneck Scheduling for Cycletime Reduction in Semiconductor Fabrication Line

반도체 FAB공정의 사이클타임 단축을 위한 병목일정계획

In semiconductor manufacturing, wafer fabrication is the most complicated and important process, which is composed of several hundreds of process steps and several hundreds of machines involved. The productivity of the manufacturing mainly depends on how well they control balance of WIP flow to achieve maximal throughput under short manufacturing cycle time. In this paper mathematical formulation is suggested for the stepper scheduling, in which cycle time reduction and maximal production is achieved.