• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.88-90
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• 2012

This paper describes a 10-bit 10-MS/s asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) with a rail-to-rail input range. The proposed SAR ADC consists of a capacitor digital-analog converter (DAC), a SAR logic and a comparator. To reduce the frequency of an external clock, the internal clock which is asynchronously generated by the SAR logic and the comparator is used. The time-domain comparator with a offset calibration technique is used to achieve a high resolution. To reduce the power consumption and area, a split capacitor-based differential DAC is used. The designed asynchronous SAR ADC is fabricated by using a 0.18 um CMOS process, and the active area is $420{\times}140{\mu}m^2$. It consumes the power of 0.818 mW with a 1.8 V supply and the FoM is 91.8 fJ/conversion-step.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.301-304
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• 2002

This paper has been studied an A/D conversion system for precision weighing signal process In weighing system. A/D conversion has some problem.; offset drift voltage with environment situation and nonzero value of initial output voltage. The Offset voltage in analog circuit produces a drift of an output voltage before A/D conversion stage. This paper suggested the method of reducing the offset voltage by switching analog chopping circuit and making the initial output close to zero to enhance the swing range by D/A converter. Also, we have designed active filter and digital filter with Auto Zero Tracking algorithm for better signal process of the weighing system.

• Journal of Advanced Marine Engineering and Technology
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• v.28 no.3
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• pp.531-537
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• 2004

In this paper, the static and dynamic characteristics in the sensor tube of a mass flow controller(MFC) were studied by experiments. In the sensor tube of MFC. the difference of temperature between inlet and outlet was necessary for calculating the mass flow rate. Therefore, the relations among flow rate, heat generated by heating wire. and sensor location were investigated to find optimized condition. Finally, the relation between sensor voltage through analog digital conversion(ADC) and flow rate in the sensor tube can be represented. Based on this study, static and dynamic characteristics of sensor tube can be used for design of mass flow controller.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.10 s.340
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• pp.39-46
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• 2005

A DC-DC converter with digital controller is realized. the digital controller has several advantages such as robustness, fast design time, and high flexibility. however, since the DC-DC output voltage is analog, an analog-to-digital conversion scheme is always essential in all digital controllers. A simple and efficient delta-sigma modulator is used as a conversion scheme in out implementation. The measurement results show good voltage regulation

• Journal of the Korea Society of Computer and Information
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• v.7 no.4
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• pp.115-120
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• 2002

This paper presents the implementation of IS-95 CDMA signal processor, baseband and Intermediate Frequency(IF) digital converter using Field Programmable Gate Array(FPGA) and ADC/DAC and frequency up/down converter IS-95 CDMA channel processor is generated the pilot channel signal with short PN code and Walsh-code generator. The digital If is composed of FPGA. digital transmit/receive signal processor and high speed analog-to-digital converter(ADC) and digital-to-analog converter(DAC). The frequency up/down converter consisted of filter, mixer, digital attenuator and PLL is analog conversion between intermediate frequency(IF) and baseband. This implemented system can be deployed in the IS-95 CDMA base station device etc.

• KIEE International Transactions on Electrophysics and Applications
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• v.3C no.6
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• pp.220-223
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• 2003

In this paper, a new frequency-to-digital converter without an analog element is proposed. The proposed circuit consists of pulse-shrinking elements, latches and D flip-flops, and the operation is based on frequency comparison by the pulse-shrinking element. In the proposed circuit, the resolution of digital output can be easily improved by increasing the number of the pulse-shrinking elements. The FDC performance is improved in viewpoints of operating speed and chip area. In designed FDC, error of frequency-to-digital conversion is less than 0.1 %.

• Journal of Sensor Science and Technology
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• v.24 no.3
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• pp.169-174
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• 2015

In this study, we developed a system to detect the various defects in the metallic objects using the phenomenon that the defects cause the changes of the natural resonant frequencies. Our system consists of a FFT Amp, an Auto Impact Hammer, a Hammer controller and a PC. Auto Impact Hammer creates vibrations in the metallic objects when tapped on the surface. These vibrational signals are converted to the voltage signals by an acceleration sensor attached to the metallic part surface. These analog voltage signals were fed into an ADC (analog-digital converter) and an FFT (fast fourier transform) conversion in the FFT Amp to obtain the digital data in the frequency domain. Labview graphical program was used to process the digital data from th FFT amp to display the spectrum. We compared those spectra with the standard spectrum to find the shifts in the resonant frequencies of the metal parts, and thus detecting the defects. We used PCB's acceleration sensor and TI's TMS320F28335 DSP (digital signal processor) to obtain the resolution of 2.93 Hz and to analyze the frequencies up to 44 kHz.

• Journal of electromagnetic engineering and science
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• v.11 no.4
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• pp.304-310
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• 2011

The application of time-domain methods in emission measurement instruments allows for a reduction in scan time by several orders of magnitude and for new evaluation methods to be realized such as the real-time spectrogram to characterize transient emissions. In this paper two novel systems for time-domain EMI measurements above 1 GHz are presented. The first system combines ultra-fast analog-to-digital-conversion and real-time digital signal processing on a field-programmable-gate-array (FPGA) with ultra-broadband multi-stage down-conversion to enable measurements in the range from 10 Hz to 26 GHz with high sensitivity and full-compliance with the requirements of CISPR 16-1-1. The required IF bandwidths were added to allow for measurements according to MIL-461F and DO-160F. The second system realizes a system of time-interleaved analog-to-digital converters (ADCs) and has an upper bandwidth limit of 4 GHz. With the implementation of an automatic mismatch calibration, the system fulfills CISPR 16-1-1 dynamic range requirements. Measurements of the radiated emissions of electronic consumer devices and household appliances like the non-stationary emissions of a microwave oven are presented. A measurement of a personal computer's conducted emissions on a power supply line according to DO-160F is given.

• Journal of Communications and Networks
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• v.17 no.1
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• pp.12-20
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• 2015

Convolutional codes which are terminated by direct truncation (DT) and zero tail termination provide unequal error protection. When DT terminated convolutional codes are used to encode short messages, they have interesting error protection properties. Such codes match the significance of the output bits of common quantizers and therefore lead to a low mean square error (MSE) when they are used to encode quantizer outputs which are transmitted via a noisy digital communication system. A code construction method that allows adapting the code to the channel is introduced, which is based on time-varying convolutional codes. We can show by simulations that DT terminated convolutional codes lead to a lower MSE than standard block codes for all channel conditions. Furthermore, we develop an MSE approximation which is based on an upper bound on the error probability per information bit. By means of this MSE approximation, we compare the convolutional codes to linear unequal error protection code construction methods from the literature for code dimensions which are relevant in analog to digital conversion systems. In numerous situations, the DT terminated convolutional codes have the lowest MSE among all codes.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.562-564
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• 2002

Noise reduction and a simplification of a precision measurement system has been performed by changing analog output mode of a load cell into digital output mode. Usually, analog output signal of a few $\mu V$ from a load cell are amplified by amp and acquired by A/D converter. If the distance from a load cell to a DAS(Data Acquisition System) increases, more noise signals are mixed. So, a microprocessor has been integrated into a load cell so that the amplification and A/D conversion of output signals could be done in close proximity to the lode cell for the reduction in mixing of noise. Obtained data from the load cell like this manner are transferred to a computer with digital values(of TTL level). To simplify the configuration of a multi-channel DAS, RS-485 communication system has used for data transfer.