• 제목/요약/키워드: amorphous oxide semiconductor

검색결과 144건 처리시간 0.026초

볼로메터용 바나듐-텅스텐 산화물로 표면 미세가공한 비냉각 적외선 감지기의 특성

  • 한용희;김근테;이승훈;신현준;문성욱;최인훈
    • 한국반도체및디스플레이장비학회:학술대회논문집
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    • 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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    • pp.124-128
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    • 2005
  • To produce a highly sensitive uncooled microbolometer, the development of a high-performance thermometric material is essential. In this work, amorphous vanadium-tungsten oxide was developed as a thermometric material at a low temperature of $300^{\circ}C$, and the microbolometer, coupled with the material, was designed and fabricated using surface micromachining technology. The vanadium-tungsten oxide showed good properties for application to the microbolometer, Such as a high temperature coefficient of resistance of over -4.0 $\%$/K and good compatibility with the surface micromachining and integrated circuit fabrication process due to its low fabrication temperature. As a result, the uncooled microbolometer could be fabricated with high detectivity over $1.0\;{\times}\;10^9\;cmHz^{1/2}/W$ at a bias current of $7.5\;{\mu}A$ and a chopper frequency of 10-20 Hz

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Zn 타겟을 이용한 ZnO 박막트랜지스터의 스퍼터링 성장 (Sputtering Growth of ZnO Thin-Film Transistor Using Zn Target)

  • 우맹;조중열
    • 반도체디스플레이기술학회지
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    • 제13권3호
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    • pp.35-38
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    • 2014
  • Flat panel displays fabricated on glass substrate use amorphous Si for data processing circuit. Recent progress in display technology requires a new material to replace the amorphous Si, and ZnO is a good candidate. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. ZnO is usually grown by sputtering using ZnO ceramic target. However, ceramic target is more expensive than metal target, and making large area target is very difficult. In this work we studied characteristics of ZnO thin-film transistor grown by rf sputtering using Zn metal target and $CO_2$. ZnO film was grown at $450^{\circ}C$ substrate temperature, with -70 V substrate bias voltage applied. By using these methods, our ZnO TFT showed $5.2cm^2/Vsec$ mobility, $3{\times}10^6$ on-off ratio, and -7 V threshold voltage.

Oxide Semiconductor Thin Film Transistor based Solution Charged Cellulose Paper Gate Dielectric using Microwave Irradiation

  • 이성영;조광원;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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    • pp.207.1-207.1
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    • 2015
  • 차세대 디스플레이 소자로서 TAOS TFT (transparent amorphous oxide semiconductor Thin Film Transistor)가 주목 받고 있다. 또한, 최근에는 값 비싼 전자 제품을 저렴하고 간단히 처분 할 수 있는 시스템으로 대신 하는 연구가 진행되고 있다. 그중, cellulose-fiber에 전기적 시스템을 포함시키는 e-paper에 대한 관심이 활발하다. cellulose fiber는 가볍고 깨지지 않으며 휘는 성질을 가지고 있다. 가격도 저렴하고 가공이 용이하여 차세대 기판의 재료로서 주목받고 있다. 하지만, cellulose-fiber 위에는 고온의 열처리공정과 고품질 박막 성장이 어려워서 TFT 제작에 어려움을 겪고 있다. 이러한 문제를 해결하기 위해서 산화물 반도체를 이용하여 TFT를 제작한 사례가 보고되고 있다. 또한, 채널 물질 뿐만 아니라 cellulose fiber에도 다른 물질을 첨가하거나 증착하여 전기적 화학적 특성을 개선시킨 사례도 많이 보고되고 있다. 본 연구에서는 가장 저품질의 용지로 알려진 신문지와 A4용지를 gate dielectric을 이용하여서 a-IGZO TFT를 제작하였다. 하지만, cellulose fiber로 만들어진 TFT의 경우에는 고온의 열처리가 불가능 하다. 따라서 저온에서 높을 효율은 보이는 microwave energy를 이용하여 열처리를 진행하였다. 추가적으로 저품질의 종이의 특성을 개선시키기 위해서 high-k metal-oxide solution precursor를 첨가 하여 TFT의 특성을 개선시켰다. 결과적으로 cellulose fiber에 metal-oxide solution precursor을 첨가하는 공정과 micro wave를 조사하는 방법을 사용하여 100도 이하에서 cellulose fiber를 저렴하고 우수한 성능의 TFT를 제작에 성공하였다.

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Investigation of Bias Stress Stability of Solution Processed Oxide Thin Film Transistors

  • Jeong, Young-Min;Song, Keun-Kyu;Kim, Dong-Jo;Koo, Chang-Young;Moon, Joo-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1582-1585
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    • 2009
  • The effects of bias stress on spin-coated zinc tin oxide (ZTO) transistors are investigated. Applying a positive bias stress results in the displacement of the transfer curves in the positive direction without changing the field effect mobility or the subthreshold behavior. Device instability appears to be a consequence of the charging and discharging of temporal trap states at the interface and in the zinc tin oxide channel region.

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Analysis of wet chemical tunnel oxide layer characteristics capped with phosphorous doped amorphous silicon for high efficiency crystalline Si solar cell application

  • Kang, Ji-yoon;Jeon, Minhan;Oh, Donghyun;Shim, Gyeongbae;Park, Cheolmin;Ahn, Shihyun;Balaji, Nagarajan;Yi, Junsin
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.406-406
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    • 2016
  • To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

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Highly stable amorphous indium.gallium.zinc-oxide thin-film transistor using an etch-stopper and a via-hole structure

  • Mativenga, M.;Choi, J.W.;Hur, J.H.;Kim, H.J.;Jang, Jin
    • Journal of Information Display
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    • 제12권1호
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    • pp.47-50
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    • 2011
  • Highly stable amorphous indium.gallium.zinc-oxide (a-IGZO) thin-film transistors (TFTs) were fabricated with an etchstopper and via-hole structure. The TFTs exhibited 40 $cm^2$/V s field-effect mobility and a 0.21 V/dec gate voltage swing. Gate-bias stress induced a negligible threshold voltage shift (${\Delta}V_{th}$) at room temperature. The excellent stability is attribute to the via-hole and etch-stopper structure, in which, the source/drain metal contacts the active a-IGZO layer through two via holes (one on each side), resulting in minimized damage to the a-IGZO layer during the plasma etching of the source/drain metal. The comparison of the effects of the DC and AC stress on the performance of the TFTs at $60^{\circ}C$ showed that there was a smaller ${\Delta}V_{th}$ in the AC stress compared with the DC stress for the same effective stress time, indicating that the trappin of the carriers at the active layer-gate insulator interface was the dominant degradation mechanism.

나노결정 InGaZnO 산화물 박막트랜지스터와 비결정 InGaZnO 산화물 박막트랜지스터의 소자 신뢰성에 관한 비교 연구 (Comparison of Stability on the Nano-crystalline Embedded InGaZnO and Amorphous InGaZnO Oxide Thin-film Transistors)

  • 신현수;안병두;임유승;김현재
    • 한국전기전자재료학회논문지
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    • 제24권6호
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    • pp.473-479
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    • 2011
  • In this paper, we have compared amorphous InGaZnO (a-IGZO) thin-film transistor (TFT) with the nano-crystalline embedded-IGZO ($N_c$-embedded-IGZO) TFT fabricated by solid-phase crystallization (SPC) technique. The field effect mobility (${\mu}_{FE}$) of $N_c$-embedded-IGZO TFT was 2.37 $cm^2/Vs$ and the subthreshold slope (S-factor) was 0.83 V/decade, which showed lower performance than those of a-IGZO TFT (${\mu}_{FE}$ of a-IGZO was 9.67 $cm^2/Vs$ and S-factor was 0.19 V/decade). This results originated from generation of oxygen vacancies in oxide semiconductor and interface between gate insulator and semiconductor due to high temperature annealing process. However, the threshold voltage shift (${\Delta}V_{TH}$) of $N_c$-embedded-IGZO TFT was 0.5 V, which showed 1 V less shift than that of a-IGZO TFT under constant current stress during $10^5$ s. This was because there were additionally less increase of interface trap charges in Nc-embedded-IGZO TFT than a-IGZO TFT.

Ag 두께에 따른 IGZO/Ag/IGZO 다층 박막의 특성 연구 (Characteristics of IGZO/Ag/IGZO Multilayer Thin Films Depending on Ag Thickness)

  • 장야쥔;김홍배;이상렬
    • 한국전기전자재료학회논문지
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    • 제26권7호
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    • pp.510-514
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    • 2013
  • In order to prevent heat loss that occurs through the glass, low-emissivity (Low-E) coating methods with good insulating properties and high transmittance were used. InGaZnO/Ag/InGaZnO (IGZO/Ag/IGZO) multilayer thin films have been deposited on XG glass substrate by RF magnetron sputtering. Depending on the different thickness of Ag in multilayer films, the structural and optical properties of Low-E multilayer films were analyzed. By XRD analysis results, the multilayer thin films were observed to be amorphous structure regardless of Ag thickness. According to the AFM results, surface morphology of the multilayer films was observed and compared. Using UV-VIS spectroscopy, low emissivity property has been observed clearly with the transmittance of higher than 85% at visible range and lower than 30% at IR range.

ZnO 스퍼터링에서 기판전압의 변화에 의한 성장 조절 (Control of ZnO Sputtering Growth by Changing Substrate Bias Voltage)

  • ;최재원;전원진;조중열
    • 반도체디스플레이기술학회지
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    • 제16권2호
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    • pp.94-97
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    • 2017
  • Amorphous Si has been used for data processing circuits in flat panel displays. However, low mobility of the amorphous Si is a limiting factor for the data transmission speed. Metal oxides such as ZnO have been studied to replace the amorphous Si. ZnO is a wide bandgap (3.3 eV) semiconductor with high mobility and good optical transparency. When ZnO is grown by sputtering with $O_2$ as an oxidizer, there can be many ion species arising from $O_2$ decomposition. $O^+$, $O_2{^+}$, and $O^-$ ions are expected to be the most abundant species, and it is not clear which one contributes to the ZnO growth. We applied alternating substrate voltage (0 V and -70 V) during sputtering growth. We studied changes in transistor characteristics induced by the voltage switching. We also compared ZnO grown by dc and rf sputtering. ZnO film was grown at $450^{\circ}C$ substrate temperature. ZnO thin-film transistor grown with these methods showed $7.5cm^2/Vsec$ mobility, $10^6$ on-off ratio, and -2 V threshold voltage.

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Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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